const char line_comment_chars[] = "#*";
const char line_separator_chars[] = "";
+static char * register_prefix = NULL;
+
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
\f
/* Options and initialization. */
-const char *md_shortopts = "Sm:";
+const char *md_shortopts = "";
struct option md_longopts[] =
{
+ {"mreg-prefix", required_argument, NULL, OPTION_MD_BASE},
+ {NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
}
void
-md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
+md_show_usage (FILE *stream)
{
+ fprintf (stream,
+ _("\ns12z options:\n"
+ " -mreg-prefix=PREFIX set a prefix used to indicate register names (default none)"
+ "\n"));
}
void
}
int
-md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED)
+md_parse_option (int c, const char *arg)
{
- return 0;
+ switch (c)
+ {
+ case OPTION_MD_BASE:
+ register_prefix = xstrdup (arg);
+ break;
+ default:
+ return 0;
+ }
+ return 1;
}
\f
symbolS *
lex_reg_name (uint16_t which, int *reg)
{
char *p = input_line_pointer;
- while (p != 0 &&
- ((*p >= 'a' && *p <='z') || (*p >= '0' && *p <= '9') || (*p >= 'A' && *p <='Z')))
+
+ if (p == 0)
+ return false;
+
+ /* Scan (and ignore) the register prefix. */
+ if (register_prefix)
+ {
+ int len = strlen (register_prefix);
+ if (0 == strncmp (register_prefix, p, len))
+ p += len;
+ else
+ return false;
+ }
+
+ char *start_of_reg_name = p;
+
+ while ((*p >= 'a' && *p <='z')
+ || (*p >= '0' && *p <= '9')
+ || (*p >= 'A' && *p <='Z'))
{
p++;
}
- size_t len = p - input_line_pointer;
+ size_t len = p - start_of_reg_name;
if (len <= 0)
return false;
gas_assert (registers[i].name);
if (len == strlen (registers[i].name)
- && 0 == strncasecmp (registers[i].name, input_line_pointer, len))
+ && 0 == strncasecmp (registers[i].name, start_of_reg_name, len))
{
if ((0x1U << i) & which)
{
@ifset GENERIC
@page
@node S12Z-Dependent
-@chapter S12Z Dependent Features
+@chapter S12Z Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
-@chapter S12Z Dependent Features
+@chapter S12Z Dependent Features
@end ifclear
The Freescale S12Z version of @code{@value{AS}} has a few machine
* S12Z-Opts:: S12Z Options
* S12Z-Syntax:: Syntax
* S12Z-Directives:: Assembler Directives
-* S12Z-opcodes:: Opcodes
+* S12Z-Opcodes:: Opcodes
@end menu
@node S12Z-Opts
@cindex options, S12Z
@cindex S12Z options
+The S12Z version of @code{@value{AS}} has the following options:
+
+@cindex @samp{-mreg-prefix=@var{prefix}} option, reg-prefix
+You can use the @samp{-mreg-prefix=@var{pfx}} option to indicate
+that the assembler expects each register name to be prefixed with the
+string @var{pfx}.
+
+For an explanation of what this means and why it might be needed,
+see @ref{Register Notation}.
+
@node S12Z-Syntax
@section Syntax
+
+@menu
+* Register Notation:: How to refer to registers
+@end menu
+
+
@cindex S12Z syntax
@cindex syntax, S12Z
@item Register
@samp{@var{reg}}
+@cindex register names, S12Z
Some instructions accept a register as an operand.
-In general, @var{reg} may be a data register (@samp{D0}, @samp{D1} @dots{}
-@samp{D7}), the @var{X} register or the @var{Y} register.
+In general, @var{reg} may be a
+data register (@samp{D0}, @samp{D1} @dots{} @samp{D7}),
+the @samp{X} register or the @samp{Y} register.
A few instructions accept as an argument the stack pointer
register (@samp{S}), and/or the program counter (@samp{P}).
Some very special instructions accept arguments which refer to the
condition code register. For these arguments the syntax is
-@samp{CCR}, @samp{CCH} or @samp{CCL} which refer to the complete condition code register, the condition code register high byte and the condition code register low byte respectively.
+@samp{CCR}, @samp{CCH} or @samp{CCL} which refer to the complete
+condition code register, the condition code register high byte
+and the condition code register low byte respectively.
+
@item Absolute Direct
@samp{@var{symbol}}, or @samp{@var{digits}}
If any of the registers @samp{D2} @dots{} @samp{D5} are specified, then
the register value is treated as a signed value.
Otherwise it is treated as unsigned.
-
-
@end table
For example:
psh cch
@end smallexample
+@node Register Notation
+@subsection Register Notation
+
+@cindex register notation, S12Z
+Without a register prefix (@pxref{S12Z-Opts}), S12Z assembler code is expected in the traditional
+format like this:
+@smallexample
+lea s, (-2,s)
+st d2, (0,s)
+ld x, symbol
+tfr d2, d6
+cmp d6, #1532
+@end smallexample
+
+@noindent
+However, if @code{@value{AS}} is started with (for example) @samp{-mreg-prefix=%}
+then all register names must be prefixed with @samp{%} as follows:
+@smallexample
+lea %s, (-2,%s)
+st %d2, (0,%s)
+ld %x, symbol
+tfr %d2, %d6
+cmp %d6, #1532
+@end smallexample
+
+The register prefix feature is intended to be used by compilers
+to avoid ambiguity between symbols and register names.
+Consider the following assembler instruction:
+@smallexample
+st d0, d1
+@end smallexample
+@noindent
+This instruction is most likely to
+mean ``Store the value in the register D0 into the register D1'' and that is the
+default way in which @code{@value{AS}} interprets it.
+However it could also be intended to mean
+``Store the value in the register D0 into the memory referenced by the symbol
+named @samp{d1}''.
+If that is what is intended then @code{@value{AS}} must be invoked with
+@samp{-mreg-prefix=@var{pfx}} and the code written as
+@smallexample
+st @var{pfx}d0, d1
+@end smallexample
+@noindent
+where @var{pfx} is the chosen register prefix.
+For this reason, compiler back-ends should choose a register prefix which
+cannot be confused with a symbol name.
+
+
@node S12Z-Directives
@section Assembler Directives
@cindex assembler directives, S12Z
-@node S12Z-opcodes
+@node S12Z-Opcodes
@section Opcodes
@cindex S12Z opcodes
projects / binutils-gdb.git / commitdiff