Pseudo-code:
- # SVP64: RA,RB,RC,RT have EXTRA2, RS as below
- # bit 8 of EXTRA is clear: RS.[s|v]=RT.[s|v]+VL
- # bit 8 of EXTRA is set : RS.[s|v]=RC.[s|v]
+ <!-- SVP64: RA,RB,RC,RT have EXTRA2, RS as below
+ <!-- bit 8 of EXTRA is clear: RS.[s|v]=RT.[s|v]+VL
+ <!-- bit 8 of EXTRA is set : RS.[s|v]=RC.[s|v]
prod[0:127] <- (RA) * (RB)
sum[0:127] <- EXTZ(RC) + prod
RT <- sum[64:127]
Pseudo-code:
- # SVP64: RA,RB,RC,RT have EXTRA2, RS as below
- # bit 8 of EXTRA is clear: RS.[s|v]=RT.[s|v]+VL
- # bit 8 of EXTRA is set : RS.[s|v]=RC.[s|v]
+ <!-- SVP64: RA,RB,RC,RT have EXTRA2, RS as below
+ <!-- bit 8 of EXTRA is clear: RS.[s|v]=RT.[s|v]+VL
+ <!-- bit 8 of EXTRA is set : RS.[s|v]=RC.[s|v]
if ((RC) <u (RB)) & ((RB) != [0]*XLEN) then
dividend[0:(XLEN*2)-1] <- (RC) || (RA)
divisor[0:(XLEN*2)-1] <- [0]*XLEN || (RB)
# get pseudocode
while True:
l = lines.pop(0).rstrip()
+ if l.strip().startswith('<!--'):
+ # print ("skipping comment", l)
+ l = lines.pop(0).rstrip() # get first line
+ continue
rewrite.append(l)
if len(l) == 0:
break
while lines:
l = lines.pop(0).rstrip()
rewrite.append(l)
- if len(l) != 0 and not l.startswith('<!--'):
+ if len(l) != 0 and not l.strip().startswith('<!--'):
break
return rewrite
# so please put ending of comments on one line:
# <!-- line 1 comment -->
# <!-- line 2 comment -->
- if l.startswith('<!--'):
+ if l.strip().startswith('<!--'):
# print ("skipping comment", l)
l = lines.pop(0).rstrip() # get next line
continue
li = []
while True:
l = lines.pop(0).rstrip()
+ if l.strip().startswith('<!--'):
+ continue
if len(l) == 0:
break
assert l.startswith(' '), ("4spcs not found in line %s" % l)
for o in opcodes:
self.add_op(o, d)
- # expect and drop whitespace
+ # expect and drop whitespace and comments
while lines:
l = lines.pop(0).rstrip()
- if len(l) != 0 and not l.startswith('<!--'):
+ if len(l) != 0 and not l.strip().startswith('<!--'):
break
def add_op(self, o, d):