context_t *context = EVERGREEN_CONTEXT(ctx);
EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
struct radeon_bo * pbo;
-
- struct radeon_bo * pbo_const;
+ struct radeon_bo * pbo_const;
+ /* const size reg is in units of 16 consts */
+ int const_size = ((evergreen->ps.num_consts * 4) + 15) & ~15;
BATCH_LOCALS(&context->radeon);
radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
{
r700SyncSurf(context, pbo_const, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
- BEGIN_BATCH_NO_AUTOSTATE(3);
-
- if(evergreen->ps.num_consts < 4)
- {
- EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_PS_0, 1);
- }
- else
- {
- EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_PS_0, (evergreen->ps.num_consts * 4)/16 );
- }
-
+ BEGIN_BATCH_NO_AUTOSTATE(3);
+ EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_PS_0, const_size / 16);
END_BATCH();
BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
context_t *context = EVERGREEN_CONTEXT(ctx);
EVERGREEN_CHIP_CONTEXT *evergreen = GET_EVERGREEN_CHIP(context);
struct radeon_bo * pbo;
-
- struct radeon_bo * pbo_const;
+ struct radeon_bo * pbo_const;
+ /* const size reg is in units of 16 consts */
+ int const_size = ((evergreen->vs.num_consts * 4) + 15) & ~15;
BATCH_LOCALS(&context->radeon);
radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
{
r700SyncSurf(context, pbo_const, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
- BEGIN_BATCH_NO_AUTOSTATE(3);
-
- if(evergreen->vs.num_consts < 4)
- {
- EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_VS_0, 1);
- }
- else
- {
- EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_VS_0, (evergreen->vs.num_consts * 4)/16 );
- }
-
+ BEGIN_BATCH_NO_AUTOSTATE(3);
+ EVERGREEN_OUT_BATCH_REGVAL(EG_SQ_ALU_CONST_BUFFER_SIZE_VS_0, const_size / 16);
END_BATCH();
BEGIN_BATCH_NO_AUTOSTATE(3 + 2);
struct gl_program_parameter_list *paramList;
unsigned int unNumParamData;
unsigned int ui;
+ int alloc_size;
/* sent out shader constants. */
paramList = fp->mesa_program.Base.Parameters;
evergreen->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
evergreen->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
}
-
+
+ /* alloc multiple of 16 constants */
+ alloc_size = ((unNumParamData * 4 * 4) + 255) & ~255;
+
/* Load fp constants to gpu */
if(unNumParamData > 0)
{
radeonAllocDmaRegion(&context->radeon,
&context->fp_Constbo,
&context->fp_bo_offset,
- unNumParamData * 4 * 4,
+ alloc_size,
256);
r600EmitShaderConsts(ctx,
context->fp_Constbo,
struct gl_program_parameter_list *paramList;
unsigned int unNumParamData;
unsigned int ui;
+ int alloc_size;
/* sent out shader constants. */
paramList = vp->mesa_program->Base.Parameters;
unNumParamData = paramList->NumParameters;
+ /* alloc multiple of 16 constants */
+ alloc_size = ((unNumParamData * 4 * 4) + 255) & ~255;
+
for(ui=0; ui<unNumParamData; ui++) {
if(paramList->Parameters[ui].Type == PROGRAM_UNIFORM)
{
radeonAllocDmaRegion(&context->radeon,
&context->vp_Constbo,
&context->vp_bo_offset,
- unNumParamData * 4 * 4,
+ alloc_size,
256);
r600EmitShaderConsts(ctx,
context->vp_Constbo,