SigPool initial_state;
std::map<std::string, RTLIL::SigSpec> asserts_a, asserts_en;
std::map<std::string, RTLIL::SigSpec> assumes_a, assumes_en;
- std::map<std::string, RTLIL::SigSpec> predict_a, predict_en;
std::map<std::string, std::map<RTLIL::SigBit, int>> imported_signals;
std::map<std::pair<std::string, int>, bool> initstates;
bool ignore_div_by_zero;
return true;
}
- if (cell->type == "$predict")
- {
- std::string pf = prefix + (timestep == -1 ? "" : stringf("@%d:", timestep));
- predict_a[pf].append((*sigmap)(cell->getPort("\\A")));
- predict_en[pf].append((*sigmap)(cell->getPort("\\EN")));
- return true;
- }
-
// Unsupported internal cell types: $pow $lut
// .. and all sequential cells except $dff and $_DFF_[NP]_
return false;