script = []
script.append("read_ilang <<rtlil\n{}\nrtlil".format(rtlil_text))
- if yosys_version >= (0, 9, 3468):
- # Yosys >=0.9+3468 (since commit f3d7e9a1) emits Verilog without a possible sim/synth
- # mismatch, making $verilog_initial_trigger unnecessary.
+ if yosys_version >= (0, 9, 3527):
+ # Yosys >=0.9+3527 (since commit 656ee70f) supports the `-nomux` option for the `proc`
+ # script pass. Because the individual `proc_*` passes are not a stable interface,
+ # `proc -nomux` is used instead, if available.
script.append("delete w:$verilog_initial_trigger")
- script.append("proc_prune")
- script.append("proc_init")
- script.append("proc_arst")
- script.append("proc_dff")
- script.append("proc_clean")
+ script.append("proc -nomux")
+ else:
+ # On earlier versions, use individual `proc_*` passes; this is a known range of Yosys
+ # versions and we know it's compatible with what nMigen does.
+ script.append("proc_init")
+ script.append("proc_arst")
+ script.append("proc_dff")
+ script.append("proc_clean")
script.append("memory_collect")
if strip_internal_attrs: