int base_offset);
bool try_emit_sat(ir_expression *ir);
- bool try_emit_mad(ir_expression *ir, int mul_arg);
+ bool try_emit_mad(ir_expression *ir);
void resolve_ud_negate(src_reg *reg);
src_reg get_timestamp();
}
bool
-vec4_visitor::try_emit_mad(ir_expression *ir, int mul_arg)
+vec4_visitor::try_emit_mad(ir_expression *ir)
{
/* 3-src instructions were introduced in gen6. */
if (brw->gen < 6)
if (ir->type->base_type != GLSL_TYPE_FLOAT)
return false;
- ir_rvalue *nonmul = ir->operands[1 - mul_arg];
- ir_expression *mul = ir->operands[mul_arg]->as_expression();
+ ir_rvalue *nonmul = ir->operands[1];
+ ir_expression *mul = ir->operands[0]->as_expression();
- if (!mul || mul->operation != ir_binop_mul)
- return false;
+ if (!mul || mul->operation != ir_binop_mul) {
+ nonmul = ir->operands[0];
+ mul = ir->operands[1]->as_expression();
+
+ if (!mul || mul->operation != ir_binop_mul)
+ return false;
+ }
nonmul->accept(this);
src_reg src0 = fix_3src_operand(this->result);
return;
if (ir->operation == ir_binop_add) {
- if (try_emit_mad(ir, 0) || try_emit_mad(ir, 1))
+ if (try_emit_mad(ir))
return;
}