sim: ppc: convert to bfd_endian

Rather than re-invent endian defines, as well as maintain our own list
of OS & arch-specific includes, punt all that logic in favor of the bfd
ones already set up and maintained elsewhere.  We already rely on the
bfd library, so leveraging the endian aspect should be fine.

This was done for all the other ports years ago, so catch ppc up.

diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog
index 723dc11fd4601603ac025ed1a65d6aa36f9aa05d..3ef5b228e46866b204d35a110b8e41095e937c92 100644 (file)
--- a/sim/ppc/ChangeLog
+++ b/sim/ppc/ChangeLog
@@ -1,3 +1,25 @@
+2021-06-16  Mike Frysinger  <vapier@gentoo.org>
+
+       * altivec.igen: Change BIG_ENDIAN to BFD_ENDIAN_BIG.
+       * configure.ac: Change LITTLE_ENDIAN, BIG_ENDIAN, & 0 to
+       BFD_ENDIAN_LITTLE, BFD_ENDIAN_BIG, & BFD_ENDIAN_UNKNOWN respectively.
+       * emul_generic.c: Likewise.
+       * options.c (options_byte_order): Likewise.  Change int to bfd_endian.
+       * psim.c (current_target_byte_order): Change type to bfd_endian.
+       (psim_create): Change LITTLE_ENDIAN & BIG_ENDIAN to BFD_ENDIAN_LITTLE
+       & BFD_ENDIAN_BIG respectively.
+       * sim-endian-n.h: Likewise.
+       * sim-endian.c: Likewise.
+       * std-config.h: Include bfd.h.
+       (LITTLE_ENDIAN, BIG_ENDIAN): Delete.
+       (HOST_BYTE_ORDER): Change to BFD_ENDIAN_BIG & BFD_ENDIAN_LITTLE.
+       (WITH_TARGET_BYTE_ORDER): Change to BFD_ENDIAN_UNKNOWN.
+       (current_target_byte_order): Change type to bfd_endian.
+       (CURRENT_TARGET_BYTE_ORDER): Compare to BFD_ENDIAN_UNKNOWN.
+       * vm.c (vm_synchronize_context): Change LITTLE_ENDIAN & BIG_ENDIAN to
+       BFD_ENDIAN_LITTLE & BFD_ENDIAN_BIG respectively.
+       * configure: Regenerate.
+
 2021-06-16  Mike Frysinger  <vapier@gentoo.org>
 
        * basics.h (__attribute__): Delete.

diff --git a/sim/ppc/altivec.igen b/sim/ppc/altivec.igen
index 6d81713d8a6f3e69122c18a2b8e3f2faefcd1e2a..8d7c79481ac886f278ba9731b358fa3c8bb93bc2 100644 (file)
--- a/sim/ppc/altivec.igen
+++ b/sim/ppc/altivec.igen
@@ -409,7 +409,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        addr = b + *rB;
        j = addr & 0xf;
        for (i = 0; i < 16; i++)
-         if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+         if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
            (*vS).b[AV_BINDEX(i)] = j++;
          else
            (*vS).b[AV_BINDEX(15 - i)] = j++;
@@ -424,7 +424,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        addr = b + *rB;
        j = 0x10 - (addr & 0xf);
        for (i = 0; i < 16; i++)
-         if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+         if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
            (*vS).b[AV_BINDEX(i)] = j++;
          else
            (*vS).b[AV_BINDEX(15 - i)] = j++;
@@ -437,7 +437,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        if (RA_is_0) b = 0;
        else         b = *rA;
        EA = (b + *rB) & ~0xf;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
          (*vS).w[0] = MEM(unsigned, EA + 0, 4);
          (*vS).w[1] = MEM(unsigned, EA + 4, 4);
          (*vS).w[2] = MEM(unsigned, EA + 8, 4);
@@ -456,7 +456,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        if (RA_is_0) b = 0;
        else         b = *rA;
        EA = (b + *rB) & ~0xf;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
          (*vS).w[0] = MEM(unsigned, EA + 0, 4);
          (*vS).w[1] = MEM(unsigned, EA + 4, 4);
          (*vS).w[2] = MEM(unsigned, EA + 8, 4);
@@ -496,7 +496,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        else         b = *rA;
        EA = b + *rB;
        eb = EA & 0xf;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
          STORE(EA, 1, (*vS).b[eb]);
        else
          STORE(EA, 1, (*vS).b[15-eb]);
@@ -510,7 +510,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        else         b = *rA;
        EA = (b + *rB) & ~1;
        eb = EA & 0xf;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
          STORE(EA, 2, (*vS).h[eb/2]);
        else
          STORE(EA, 2, (*vS).h[7-eb]);
@@ -524,7 +524,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        else         b = *rA;
        EA = (b + *rB) & ~3;
        eb = EA & 0xf;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
          STORE(EA, 4, (*vS).w[eb/4]);
        else
          STORE(EA, 4, (*vS).w[3-(eb/4)]);
@@ -536,7 +536,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        if (RA_is_0) b = 0;
        else         b = *rA;
        EA = (b + *rB) & ~0xf;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
          STORE(EA + 0, 4, (*vS).w[0]);
          STORE(EA + 4, 4, (*vS).w[1]);
          STORE(EA + 8, 4, (*vS).w[2]);
@@ -555,7 +555,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        if (RA_is_0) b = 0;
        else         b = *rA;
        EA = (b + *rB) & ~0xf;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
          STORE(EA + 0, 4, (*vS).w[0]);
          STORE(EA + 4, 4, (*vS).w[1]);
          STORE(EA + 8, 4, (*vS).w[2]);
@@ -1915,7 +1915,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        sh = (*vB).b[0] & 7;    /* don't bother checking everything */
        carry = 0;
        for (j = 3; j >= 0; j--) {
-         if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+         if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
            i = j;
          else
            i = (j + 2) % 4;
@@ -1951,7 +1951,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
 
 0.4,6.VS,11.VA,16.VB,21.1036:VX:av:vslo %VD, %VA, %VB:Vector Shift Left by Octet
        int i, sh;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
          sh = ((*vB).b[AV_BINDEX(15)] >> 3) & 0xf;
        else
          sh = ((*vB).b[AV_BINDEX(0)] >> 3) & 0xf;
@@ -2040,7 +2040,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
        sh = (*vB).b[0] & 7;    /* don't bother checking everything */
        carry = 0;
        for (j = 0; j < 4; j++) {
-         if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+         if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
            i = j;
          else
            i = (j + 2) % 4;
@@ -2098,7 +2098,7 @@ unsigned32::model-function::altivec_unsigned_saturate_32:signed64 val, int *sat
 
 0.4,6.VS,11.VA,16.VB,21.1100:VX:av:vsro %VD, %VA, %VB:Vector Shift Right Octet
        int i, sh;
-       if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
+       if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
          sh = ((*vB).b[AV_BINDEX(15)] >> 3) & 0xf;
        else
          sh = ((*vB).b[AV_BINDEX(0)] >> 3) & 0xf;

diff --git a/sim/ppc/configure b/sim/ppc/configure
index 65fe1846d63336ecc08c36eda11042507cdb1e2e..10903a0f13ce88d259f4157f5aa20fe6e6c2307d 100755 (executable)
--- a/sim/ppc/configure
+++ b/sim/ppc/configure
@@ -3227,13 +3227,13 @@ fi
 if test "${enable_sim_endian+set}" = set; then :
   enableval=$enable_sim_endian; case "${enableval}" in
   yes) case "$target" in
-         *powerpc-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
-         *powerpcle-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
-         *) echo "Unknown target $target" 1>&6; sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
+         *powerpc-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_BIG";;
+         *powerpcle-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_LITTLE";;
+         *) echo "Unknown target $target" 1>&6; sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_UNKNOWN";;
        esac;;
-  no)   sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
-  b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
-  l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
+  no)   sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_UNKNOWN";;
+  b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_BIG";;
+  l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_LITTLE";;
   *)    as_fn_error $? "\"Unknown value $enableval for --enable-sim-endian\"" "$LINENO" 5; sim_endian="";;
 esac
 if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then

diff --git a/sim/ppc/configure.ac b/sim/ppc/configure.ac
index 188330fa5c72adae7939d40067eb792b898b823b..376c3ce07fa4ba9853209edc6e70a8f26927dd68 100644 (file)
--- a/sim/ppc/configure.ac
+++ b/sim/ppc/configure.ac
@@ -110,13 +110,13 @@ AC_ARG_ENABLE(sim-endian,
 [  --enable-sim-endian=endian          Specify target byte endian orientation.],
 [case "${enableval}" in
   yes) case "$target" in
-         *powerpc-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
-         *powerpcle-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
-         *) echo "Unknown target $target" 1>&6; sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
+         *powerpc-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_BIG";;
+         *powerpcle-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_LITTLE";;
+         *) echo "Unknown target $target" 1>&6; sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_UNKNOWN";;
        esac;;
-  no)   sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
-  b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
-  l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
+  no)   sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_UNKNOWN";;
+  b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_BIG";;
+  l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_LITTLE";;
   *)    AC_MSG_ERROR("Unknown value $enableval for --enable-sim-endian"); sim_endian="";;
 esac
 if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then

diff --git a/sim/ppc/emul_generic.c b/sim/ppc/emul_generic.c
index 0018cea324f16a7887871a190999c7324defc804..9d57bc6c01aec2b6c6ab6cb9e84ecd12e5930c24 100644 (file)
--- a/sim/ppc/emul_generic.c
+++ b/sim/ppc/emul_generic.c
@@ -64,7 +64,7 @@ emul_read_gpr64(cpu *processor,
 {
   unsigned32 hi;
   unsigned32 lo;
-  if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
+  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
     hi = cpu_registers(processor)->gpr[g];
     lo = cpu_registers(processor)->gpr[g+1];
   }
@@ -83,7 +83,7 @@ emul_write_gpr64(cpu *processor,
 {
   unsigned32 hi = EXTRACTED64(val, 0, 31);
   unsigned32 lo = EXTRACTED64(val, 32, 63);
-  if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
+  if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
     cpu_registers(processor)->gpr[g] = hi;
     cpu_registers(processor)->gpr[g+1] = lo;
   }

diff --git a/sim/ppc/options.c b/sim/ppc/options.c
index 330332ddf08d0be05021d0032ae683dc53c830d5..d20fb04e6caa6783c4ec636fbb20cd619c34be7b 100644 (file)
--- a/sim/ppc/options.c
+++ b/sim/ppc/options.c
@@ -25,12 +25,11 @@
 
 STATIC_INLINE_OPTIONS\
 (const char *)
-options_byte_order (int order)
+options_byte_order (enum bfd_endian order)
 {
   switch (order) {
-  case 0:              return "0";
-  case BIG_ENDIAN:     return "BIG_ENDIAN";
-  case LITTLE_ENDIAN:  return "LITTLE_ENDIAN";
+  case BFD_ENDIAN_BIG:         return "BIG_ENDIAN";
+  case BFD_ENDIAN_LITTLE:      return "LITTLE_ENDIAN";
   }
 
   return "UNKNOWN";

diff --git a/sim/ppc/psim.c b/sim/ppc/psim.c
index 0c3f5a1090c3ac1846361aec3c5ed79e4c107666..e8c29fff46040e0d05f5081ca9894d124647935e 100644 (file)
--- a/sim/ppc/psim.c
+++ b/sim/ppc/psim.c
@@ -63,7 +63,7 @@ struct _psim {
 };
 
 
-int current_target_byte_order;
+enum bfd_endian current_target_byte_order;
 int current_environment;
 int current_alignment;
 int current_floating_point;
@@ -450,8 +450,8 @@ psim_create(const char *file_name,
   /* fill in the missing TARGET BYTE ORDER information */
   current_target_byte_order
     = (tree_find_boolean_property(root, "/options/little-endian?")
-       ? LITTLE_ENDIAN
-       : BIG_ENDIAN);
+       ? BFD_ENDIAN_LITTLE
+       : BFD_ENDIAN_BIG);
   if (CURRENT_TARGET_BYTE_ORDER != current_target_byte_order)
     error("target and configured byte order conflict\n");
 

diff --git a/sim/ppc/sim-endian-n.h b/sim/ppc/sim-endian-n.h
index 415149e569dd365c68a4c110e6484e3a217285dc..a9b2e20782343eb277b9ca690c7730cb6a6ea514 100644 (file)
--- a/sim/ppc/sim-endian-n.h
+++ b/sim/ppc/sim-endian-n.h
@@ -73,7 +73,7 @@ INLINE_PSIM_ENDIAN\
 (unsigned_N)
 endian_h2be_N(unsigned_N raw_in)
 {
-  if (HOST_BYTE_ORDER == BIG_ENDIAN) {
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG) {
     return raw_in;
   }
   else {
@@ -86,7 +86,7 @@ INLINE_PSIM_ENDIAN\
 (unsigned_N)
 endian_be2h_N(unsigned_N raw_in)
 {
-  if (HOST_BYTE_ORDER == BIG_ENDIAN) {
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_BIG) {
     return raw_in;
   }
   else {
@@ -99,7 +99,7 @@ INLINE_PSIM_ENDIAN\
 (unsigned_N)
 endian_h2le_N(unsigned_N raw_in)
 {
-  if (HOST_BYTE_ORDER == LITTLE_ENDIAN) {
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_LITTLE) {
     return raw_in;
   }
   else {
@@ -112,7 +112,7 @@ INLINE_PSIM_ENDIAN\
 (unsigned_N)
 endian_le2h_N(unsigned_N raw_in)
 {
-  if (HOST_BYTE_ORDER == LITTLE_ENDIAN) {
+  if (HOST_BYTE_ORDER == BFD_ENDIAN_LITTLE) {
     return raw_in;
   }
   else {

diff --git a/sim/ppc/sim-endian.c b/sim/ppc/sim-endian.c
index 29f51e5a8d0f86ea79c88e4b2af7f6ead784cdb3..ee1e0839939b8e520cdb524377e8dbc7b9a8ca68 100644 (file)
--- a/sim/ppc/sim-endian.c
+++ b/sim/ppc/sim-endian.c
@@ -32,7 +32,7 @@
 #define _SWAP_1(SET,RAW) SET (RAW)
 #endif
 
-#if !defined(_SWAP_2) && (HOST_BYTE_ORDER == LITTLE_ENDIAN) && defined(htons)
+#if !defined(_SWAP_2) && (HOST_BYTE_ORDER == BFD_ENDIAN_LITTLE) && defined(htons)
 #define _SWAP_2(SET,RAW) SET htons (RAW)
 #endif
 
@@ -40,7 +40,7 @@
 #define _SWAP_2(SET,RAW) SET (((RAW) >> 8) | ((RAW) << 8))
 #endif
 
-#if !defined(_SWAP_4) && (HOST_BYTE_ORDER == LITTLE_ENDIAN) && defined(htonl)
+#if !defined(_SWAP_4) && (HOST_BYTE_ORDER == BFD_ENDIAN_LITTLE) && defined(htonl)
 #define _SWAP_4(SET,RAW) SET htonl (RAW)
 #endif
 

diff --git a/sim/ppc/std-config.h b/sim/ppc/std-config.h
index 375ba730beaceb4b509fb0e571ff5d832eb51d71..7b8f91138597ea0145ce51555d0e61efb2b6417d 100644 (file)
--- a/sim/ppc/std-config.h
+++ b/sim/ppc/std-config.h
@@ -21,6 +21,7 @@
 #ifndef _PSIM_CONFIG_H_
 #define _PSIM_CONFIG_H_
 
+#include "bfd.h"
 
 /* endianness of the host/target:
 
@@ -28,29 +29,23 @@
    of the host/target it is able to eliminate slower generic endian
    handling code.
 
-   Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
-
-#ifndef LITTLE_ENDIAN
-#define LITTLE_ENDIAN 1234
-#endif
-#ifndef BIG_ENDIAN
-#define BIG_ENDIAN 4321
-#endif
+   Possible values are BFD_ENDIAN_UNKNOWN, BFD_ENDIAN_LITTLE,
+   BFD_ENDIAN_BIG.  */
 
 #ifdef WORDS_BIGENDIAN
-# define HOST_BYTE_ORDER BIG_ENDIAN
+# define HOST_BYTE_ORDER BFD_ENDIAN_BIG
 #else
-# define HOST_BYTE_ORDER LITTLE_ENDIAN
+# define HOST_BYTE_ORDER BFD_ENDIAN_LITTLE
 #endif
 
 #ifndef WITH_TARGET_BYTE_ORDER
-#define WITH_TARGET_BYTE_ORDER         0 /*unknown*/
+#define WITH_TARGET_BYTE_ORDER         BFD_ENDIAN_UNKNOWN
 #endif
 
-extern int current_target_byte_order;
-#define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
-                                  ? WITH_TARGET_BYTE_ORDER \
-                                  : current_target_byte_order)
+extern enum bfd_endian current_target_byte_order;
+#define CURRENT_TARGET_BYTE_ORDER \
+  (WITH_TARGET_BYTE_ORDER != BFD_ENDIAN_UNKNOWN \
+   ? WITH_TARGET_BYTE_ORDER : current_target_byte_order)
 
 
 /* PowerPC XOR endian.

diff --git a/sim/ppc/vm.c b/sim/ppc/vm.c
index 304972e4f00e339bde82833ebf13aa05f9229e6d..00f5f55e537f3c9e8ffbec769609815b1493fa0f 100644 (file)
--- a/sim/ppc/vm.c
+++ b/sim/ppc/vm.c
@@ -974,8 +974,8 @@ vm_synchronize_context(vm *virtual,
   if (WITH_XOR_ENDIAN) {
     int i = 1;
     unsigned mask;
-    if ((little_endian && CURRENT_TARGET_BYTE_ORDER == LITTLE_ENDIAN)
-       || (!little_endian && CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN))
+    if ((little_endian && CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+       || (!little_endian && CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG))
       mask = 0;
     else
       mask = WITH_XOR_ENDIAN - 1;
@@ -988,8 +988,8 @@ vm_synchronize_context(vm *virtual,
   }
   else {
     /* don't allow the processor to change endian modes */
-    if ((little_endian && CURRENT_TARGET_BYTE_ORDER != LITTLE_ENDIAN)
-       || (!little_endian && CURRENT_TARGET_BYTE_ORDER != BIG_ENDIAN))
+    if ((little_endian && CURRENT_TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE)
+       || (!little_endian && CURRENT_TARGET_BYTE_ORDER != BFD_ENDIAN_BIG))
       cpu_error(processor, cia, "attempt to change hardwired byte order");
   }
 }