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intel/gen12+: Set way_size_per_bank to 4
author
Anuj Phogat
<anuj.phogat@gmail.com>
Sat, 5 Jan 2019 00:06:04 +0000
(16:06 -0800)
committer
Anuj Phogat
<anuj.phogat@gmail.com>
Sat, 1 Feb 2020 02:14:54 +0000
(18:14 -0800)
This patch fixes the way_size_per_bank for Gen12+
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge<sagar.ghuge@intel.com>
src/intel/common/gen_l3_config.c
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diff --git
a/src/intel/common/gen_l3_config.c
b/src/intel/common/gen_l3_config.c
index 19ea07eef2ddd4df17ef549af4f9cfc352e32b9e..46926f8bdf4952a435bddf9ad3fcddeff5c96d98 100644
(file)
--- a/
src/intel/common/gen_l3_config.c
+++ b/
src/intel/common/gen_l3_config.c
@@
-321,7
+321,7
@@
static unsigned
get_l3_way_size(const struct gen_device_info *devinfo)
{
const unsigned way_size_per_bank =
- (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen
=
= 11 ?
+ (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen
>
= 11 ?
4 : 2;
assert(devinfo->l3_banks);