static t_inst
mips_fetch_instruction (CORE_ADDR addr)
{
- char buf[MIPS32_INSN_SIZE];
+ char buf[MIPS_INSN32_SIZE];
int instlen;
int status;
if (mips_pc_is_mips16 (addr))
{
- instlen = MIPS16_INSN_SIZE;
+ instlen = MIPS_INSN16_SIZE;
addr = unmake_mips16_addr (addr);
}
else
- instlen = MIPS32_INSN_SIZE;
+ instlen = MIPS_INSN32_SIZE;
status = deprecated_read_memory_nobpt (addr, buf, instlen);
if (status)
memory_error (status, addr);
if (limit_pc > start_pc + 200)
limit_pc = start_pc + 200;
- for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS16_INSN_SIZE)
+ for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSN16_SIZE)
{
/* Save the previous instruction. If it's an EXTEND, we'll extract
the immediate offset extension from it in mips16_get_imm. */
over the extend. */
if ((inst & 0xf800) == 0xf000) /* extend */
{
- extend_bytes = MIPS16_INSN_SIZE;
+ extend_bytes = MIPS_INSN16_SIZE;
continue;
}
&& (inst & 0x700) != 0x700) /* entry */
entry_inst = inst; /* save for later processing */
else if ((inst & 0xf800) == 0x1800) /* jal(x) */
- cur_pc += MIPS16_INSN_SIZE; /* 32-bit instruction */
+ cur_pc += MIPS_INSN16_SIZE; /* 32-bit instruction */
else if ((inst & 0xff1c) == 0x6704) /* move reg,$a0-$a3 */
{
/* This instruction is part of the prologue, but we don't
restart:
frame_offset = 0;
- for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS32_INSN_SIZE)
+ for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSN32_SIZE)
{
unsigned long inst, high_word, low_word;
int reg;
|| high_word == 0x3408 /* ori $t0,$zero,n */
))
{
- load_immediate_bytes += MIPS32_INSN_SIZE; /* FIXME! */
+ load_immediate_bytes += MIPS_INSN32_SIZE; /* FIXME! */
}
else
{
if (heuristic_fence_post == UINT_MAX || fence < VM_MIN_ADDRESS)
fence = VM_MIN_ADDRESS;
- instlen = mips_pc_is_mips16 (pc) ? MIPS16_INSN_SIZE : MIPS32_INSN_SIZE;
+ instlen = mips_pc_is_mips16 (pc) ? MIPS_INSN16_SIZE : MIPS_INSN32_SIZE;
/* search back for previous return */
for (start_pc -= instlen;; start_pc -= instlen)
else if (mips_about_to_return (start_pc))
{
/* Skip return and its delay slot. */
- start_pc += 2 * MIPS32_INSN_SIZE;
+ start_pc += 2 * MIPS_INSN32_SIZE;
break;
}
int
mips_step_skips_delay (CORE_ADDR pc)
{
- char buf[MIPS32_INSN_SIZE];
+ char buf[MIPS_INSN32_SIZE];
/* There is no branch delay slot on MIPS16. */
if (mips_pc_is_mips16 (pc))
/* Scan through this _fn_stub_ code for the lui/addiu pair.
The limit on the search is arbitrarily set to 20
instructions. FIXME. */
- for (i = 0, pc = 0; i < 20; i++, target_pc += MIPS32_INSN_SIZE)
+ for (i = 0, pc = 0; i < 20; i++, target_pc += MIPS_INSN32_SIZE)
{
inst = mips_fetch_instruction (target_pc);
if ((inst & 0xffff0000) == 0x3c010000) /* lui $at */
mips_insert_breakpoint (CORE_ADDR addr, char *contents_cache)
{
if (monitor_supports_breakpoints)
- return set_breakpoint (addr, MIPS_INSTLEN, BREAK_FETCH);
+ return set_breakpoint (addr, MIPS_INSN32_SIZE, BREAK_FETCH);
else
return memory_insert_breakpoint (addr, contents_cache);
}
mips_remove_breakpoint (CORE_ADDR addr, char *contents_cache)
{
if (monitor_supports_breakpoints)
- return clear_breakpoint (addr, MIPS_INSTLEN, BREAK_FETCH);
+ return clear_breakpoint (addr, MIPS_INSN32_SIZE, BREAK_FETCH);
else
return memory_remove_breakpoint (addr, contents_cache);
}