AArch64: Relax thumb-plt testcases regexpr.

The regexpr in these two files are a bit strict in that they don't account for
the slight changes in tags in certain arm targets which cause our address
offsets to change.   This changes the tests to allow slight movement in
locations while still strictly checking the rest.

ld/ChangeLog:

2020-08-03  Tamar Christina  <tamar.christina@arm.com>

	* testsuite/ld-arm/thumb-plt-got.d: Relax regexpr.
	* testsuite/ld-arm/thumb-plt.d: Likewise.

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 71b0d45b1401ba23ddae08d1fc412794845d2e4d..bfbc6c32cbc641729f5aeaa3ffdfd6844d24c2d4 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,8 @@
+2020-08-14  Tamar Christina  <tamar.christina@arm.com>
+
+       * testsuite/ld-arm/thumb-plt-got.d: Relax regexpr.
+       * testsuite/ld-arm/thumb-plt.d: Likewise.
+
 2020-08-13  Alan Modra  <amodra@gmail.com>
 
        * emultempl/ppc64elf.em (params): Init new field.

diff --git a/ld/testsuite/ld-arm/thumb-plt-got.d b/ld/testsuite/ld-arm/thumb-plt-got.d
index e65aba9e2f8a3129990166c458d7c82306e1af7b..370a4e2c6033639fb482887709b35e2075e87b0d 100644 (file)
--- a/ld/testsuite/ld-arm/thumb-plt-got.d
+++ b/ld/testsuite/ld-arm/thumb-plt-got.d
@@ -6,9 +6,9 @@
 
 Relocation section '.rel.plt' at offset 0x108 contains 1 entry:
  Offset     Info    Type            Sym.Value  Sym. Name
-000101c4  00000116 R_ARM_JUMP_SLOT   00000000   foo
+000101.+  00000116 R_ARM_JUMP_SLOT   00000000   foo
 
 Hex dump of section '.got':
  NOTE: This section has relocations against it, but these have NOT been applied to this dump.
-  0x000101b8 40010100 00000000 00000000 11010000 @...............
+  0x000101.+ 40010100 00000000 00000000 11010000 @...............
 

diff --git a/ld/testsuite/ld-arm/thumb-plt.d b/ld/testsuite/ld-arm/thumb-plt.d
index 441325b21db33bb12dfb21ca1d19045b951ba9fd..aa9c61f84db07871f958bc97345d36410bfabeb1 100644 (file)
--- a/ld/testsuite/ld-arm/thumb-plt.d
+++ b/ld/testsuite/ld-arm/thumb-plt.d
@@ -14,10 +14,10 @@ Disassembly of section \.plt:
  112:  f8df e008       ldr.w   lr, \[pc, #8\]  ; 11c <\.plt\+0xc>
  116:  44fe            add     lr, pc
  118:  f85e ff08       ldr.w   pc, \[lr, #8\]!
- 11c:  0001009c        \.word  0x0001009c
+ 11c:  000100(.+)      \.word  0x000100\1
 
 00000120 <foo@plt>:
- 120:  f240 0c98       movw    ip, #152        ; 0x98
+ 120:  f240 0c.+       movw    ip, #[0-9]+     ; 0x.+
  124:  f2c0 0c01       movt    ip, #1
  128:  44fc            add     ip, pc
  12a:  f8dc f000       ldr.w   pc, \[ip\]