synth_xilinx to infer DSPs for Y_WIDTH >= 9 and [AB]_WIDTH >= 2
authorEddie Hung <eddie@fpgeh.com>
Thu, 19 Sep 2019 21:58:06 +0000 (14:58 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 19 Sep 2019 21:58:06 +0000 (14:58 -0700)
techlibs/xilinx/synth_xilinx.cc

index 2ac254a1ff1d704367be520d41807efa8c59f746..b55c40764b9d411d940e061ee84874697f705a93 100644 (file)
@@ -342,7 +342,10 @@ struct SynthXilinxPass : public ScriptPass
                if (check_label("map_dsp"), "(skip if '-nodsp')") {
                        if (!nodsp || help_mode) {
                                // NB: Xilinx multipliers are signed only
-                               run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 -D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18");
+                               run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 "
+                                               "-D DSP_B_MINWIDTH=2 " // Blocks Nx1 multipliers
+                                               "-D DSP_Y_MINWIDTH=9 " // UG901 suggests small multiplies are those 4x4 and smaller
+                                               "-D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18");
                                run("xilinx_dsp");
                                run("chtype -set $mul t:$__soft_mul");
                        }