nir_alu_type src_types[MIR_SRC_COUNT];
nir_alu_type dest_type;
+ /* Modifiers, depending on type */
+ union {
+ struct {
+ bool src_abs[MIR_SRC_COUNT];
+ bool src_neg[MIR_SRC_COUNT];
+ };
+
+ struct {
+ bool src_shift[MIR_SRC_COUNT];
+ };
+ };
+
+ /* Out of the union for csel (could maybe be fixed..) */
+ bool src_invert[MIR_SRC_COUNT];
+
/* Special fields for an ALU instruction */
midgard_reg_info registers;
uint16_t mask;
- /* For accepting ALU ops - invert the nth source */
- bool src_invert[MIR_SRC_COUNT];
-
/* Hint for the register allocator not to spill the destination written
* from this instruction (because it is a spill/unspill node itself).
* Bitmask of spilled classes */
ins->src_types[0] = ins->src_types[1];
ins->src_types[1] = temp;
+ temp = ins->src_abs[0];
+ ins->src_abs[0] = ins->src_abs[1];
+ ins->src_abs[1] = temp;
+
+ temp = ins->src_neg[0];
+ ins->src_neg[0] = ins->src_neg[1];
+ ins->src_neg[1] = temp;
+
unsigned temp_swizzle[16];
memcpy(temp_swizzle, ins->swizzle[0], sizeof(ins->swizzle[0]));
memcpy(ins->swizzle[0], ins->swizzle[1], sizeof(ins->swizzle[0]));