Unbreak 655d02d5.

diff --git a/nmigen/back/rtlil.py b/nmigen/back/rtlil.py
index 2f0ed6cd29d2ab2a8d13330b2ae22eb8f0f0f067..f92c25fdf1950d8c62957175aae1b26a39d55bbf 100644 (file)
--- a/nmigen/back/rtlil.py
+++ b/nmigen/back/rtlil.py
@@ -376,7 +376,7 @@ class _RHSValueCompiler(_ValueCompiler):
         self.s.rtlil.cell("$anyconst", ports={
             "\\Y": res,
         }, params={
-            "Y_WIDTH": res_bits,
+            "WIDTH": res_bits,
         }, src=src(value.src_loc))
         return res
 
@@ -386,7 +386,7 @@ class _RHSValueCompiler(_ValueCompiler):
         self.s.rtlil.cell("$anyseq", ports={
             "\\Y": res,
         }, params={
-            "Y_WIDTH": res_bits,
+            "WIDTH": res_bits,
         }, src=src(value.src_loc))
         return res