Re: [libre-riscv-dev] processor and soc naming
authorJacob Lifshay <programmerjake@gmail.com>
Wed, 11 Mar 2020 21:21:42 +0000 (14:21 -0700)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Wed, 11 Mar 2020 21:21:55 +0000 (21:21 +0000)
b2/ad9f9cccfa50e0029e78a1269cea8a4e84c937 [new file with mode: 0644]

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+From: Jacob Lifshay <programmerjake@gmail.com>
+Date: Wed, 11 Mar 2020 14:21:42 -0700
+Message-ID: <CAC2bXD6anPZpC=XmYWCuBeYFhJ_c3APJ8T7tLUTemmG9RKmCNA@mail.gmail.com>
+To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
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+Subject: Re: [libre-riscv-dev] processor and soc naming
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