cpu: Add HTM Instruction Flags
authorTimothy Hayes <timothy.hayes@arm.com>
Fri, 10 Jan 2020 17:30:27 +0000 (17:30 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 7 Sep 2020 10:34:20 +0000 (10:34 +0000)
IsHtmStart: Starts a HTM transaction
IsHtmStop: Stops (commits) a HTM transaction
IsHtmCancel: Explicitely aborts a HTM transaction

JIRA: https://gem5.atlassian.net/browse/GEM5-587

Change-Id: I33144f97a2009e28b0c64777f0313cd6eadb7ff9
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30321
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/cpu/StaticInstFlags.py
src/cpu/static_inst.hh

index f756ba17189749f1d07459482322fb7dfa666727..1c2b63a2b5ee33eb07f1f7ba3563a844177a3538 100644 (file)
@@ -1,3 +1,4 @@
+# Copyright (c) 2020 ARM Limited
 # Copyright (c) 2003-2005 The Regents of The University of Michigan
 # Copyright (c) 2013 Advanced Micro Devices, Inc.
 # All rights reserved.
@@ -109,5 +110,9 @@ class StaticInstFlags(Enum):
         'IsMicroBranch',    # This microop branches within the microcode for
                             # a macroop
         'IsDspOp',
-        'IsSquashAfter'     # Squash all uncommitted state after executed
+        'IsSquashAfter',     # Squash all uncommitted state after executed
+        # hardware transactional memory
+        'IsHtmStart',       # Starts a HTM transaction
+        'IsHtmStop',        # Stops (commits) a HTM transaction
+        'IsHtmCancel'       # Explicitely aborts a HTM transaction
         ]
index b523ef9356fd1a4f303c941ff625e065adda5409..146be8c72d0a7859c5ebcdbce12f90245537c11d 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017 ARM Limited
+ * Copyright (c) 2017, 2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -202,6 +202,18 @@ class StaticInst : public RefCounted, public StaticInstFlags
     bool isFirstMicroop() const { return flags[IsFirstMicroop]; }
     //This flag doesn't do anything yet
     bool isMicroBranch() const { return flags[IsMicroBranch]; }
+    // hardware transactional memory
+    // HtmCmds must be identified as such in order
+    // to provide them with necessary memory ordering semantics.
+    bool isHtmStart() const { return flags[IsHtmStart]; }
+    bool isHtmStop() const { return flags[IsHtmStop]; }
+    bool isHtmCancel() const { return flags[IsHtmCancel]; }
+
+    bool
+    isHtmCmd() const
+    {
+        return isHtmStart() || isHtmStop() || isHtmCancel();
+    }
     //@}
 
     void setFirstMicroop() { flags[IsFirstMicroop] = true; }