+# Copyright (c) 2020 ARM Limited
# Copyright (c) 2003-2005 The Regents of The University of Michigan
# Copyright (c) 2013 Advanced Micro Devices, Inc.
# All rights reserved.
'IsMicroBranch', # This microop branches within the microcode for
# a macroop
'IsDspOp',
- 'IsSquashAfter' # Squash all uncommitted state after executed
+ 'IsSquashAfter', # Squash all uncommitted state after executed
+ # hardware transactional memory
+ 'IsHtmStart', # Starts a HTM transaction
+ 'IsHtmStop', # Stops (commits) a HTM transaction
+ 'IsHtmCancel' # Explicitely aborts a HTM transaction
]
/*
- * Copyright (c) 2017 ARM Limited
+ * Copyright (c) 2017, 2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
bool isFirstMicroop() const { return flags[IsFirstMicroop]; }
//This flag doesn't do anything yet
bool isMicroBranch() const { return flags[IsMicroBranch]; }
+ // hardware transactional memory
+ // HtmCmds must be identified as such in order
+ // to provide them with necessary memory ordering semantics.
+ bool isHtmStart() const { return flags[IsHtmStart]; }
+ bool isHtmStop() const { return flags[IsHtmStop]; }
+ bool isHtmCancel() const { return flags[IsHtmCancel]; }
+
+ bool
+ isHtmCmd() const
+ {
+ return isHtmStart() || isHtmStop() || isHtmCancel();
+ }
//@}
void setFirstMicroop() { flags[IsFirstMicroop] = true; }