(no commit message)

diff --git a/openpower/sv/svp_rewrite/svp64/discussion.mdwn b/openpower/sv/svp_rewrite/svp64/discussion.mdwn
index 018ffde3ea95a4c0bb25c7cf1fccc02006963f85..2b6273a4c36181f9397e5fe53c59106200aa52d6 100644 (file)
--- a/openpower/sv/svp_rewrite/svp64/discussion.mdwn
+++ b/openpower/sv/svp_rewrite/svp64/discussion.mdwn
@@ -90,7 +90,8 @@ Some examples on different operation widths:
      0   1   inv CR-bit    Rc=1: ffirst CR sel
      0   1   inv sz   dz   Rc=0: ffirst z/nonz
      1   0   N   sz   dz   sat mode: N=0/1 u/s
-     1   1      rsvd       reserved
+     1   1   0   sz   dz   pred zeroing
+     1   1   1    rsvd     reserved
 
 
 # Notes about rounding, clamp and saturate