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lkcl
<lkcl@web>
Thu, 11 Jun 2020 05:11:29 +0000
(06:11 +0100)
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IkiWiki
<ikiwiki.info>
Thu, 11 Jun 2020 05:11:29 +0000
(06:11 +0100)
3d_gpu/architecture/memory_and_cache.mdwn
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diff --git
a/3d_gpu/architecture/memory_and_cache.mdwn
b/3d_gpu/architecture/memory_and_cache.mdwn
index a9f0910f901daa064310eb2b3b2d5067e3c5e6ac..e3ad496b5ba1f067b0775d6c7f392b82523be5e7 100644
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3d_gpu/architecture/memory_and_cache.mdwn
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3d_gpu/architecture/memory_and_cache.mdwn
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-39,7
+39,7
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Basic diagram:
[Enjoy-Digital Litex](https://github.com/enjoy-digital/litex)
code takes over, and connect to peripherals and testing infrastructure.
-* Memory is the silicon-proven OpenCores [
SDRAM|sdram
] interface,
+* Memory is the silicon-proven OpenCores [
[SDRAM|sdram]
] interface,
and it is Wishbone compliant.
## Memory Interface Required by LDSTComputationalUnit