Correct a problem with the ISA bit being stripped from the addend of
compressed branch relocations, affecting RELA targets.  It has been
there since microMIPS support has been added, with:
commit 
df58fc944dbc6d5efd8d3826241b64b6af22f447
Author: Richard Sandiford <rdsandiford@googlemail.com>
Date:   Sun Jul 24 14:20:15 2011 +0000
<https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS:
microMIPS ASE support") and R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and
R_MICROMIPS_PC16_S1 relocations originally affected, and the
R_MIPS16_PC16_S1 relocation recently added with commit 
c9775dde3277
("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support") actually
triggering a linker error, due to its heightened processing strictness
level:
$ cat test.s
	.text
	.set	mips16
foo:
	b	bar
	.set	bar, 0x1235
	.align	4, 0
$ as -EB -n32 -o test.o test.s
$ objdump -dr test.o
test.o:     file format elf32-ntradbigmips
Disassembly of section .text:
00000000 <foo>:
   0:	f000 1000 	b	4 <foo+0x4>
			0: R_MIPS16_PC16_S1	*ABS*+0x1230
	...
$ ld -melf32btsmipn32 -Ttext 0 -e 0 -o test test.o
test.o: In function `foo':
(.text+0x0): Branch to a non-instruction-aligned address
$
This is because the ISA bit of the branch target does not match the ISA
bit of the referring branch, hardwired to 1 of course.
Retain the ISA bit then, so that the linker knows this is really MIPS16
code referred:
$ objdump -dr fixed.o
fixed.o:     file format elf32-ntradbigmips
Disassembly of section .text:
00000000 <foo>:
   0:	f000 1000 	b	4 <foo+0x4>
			0: R_MIPS16_PC16_S1	*ABS*+0x1231
	...
$ ld -melf32btsmipn32 -Ttext 0 -e 0 -o fixed fixed.o
$
Add a set of MIPS16 tests to cover the relevant cases, excluding linker
tests though which would overflow the in-place addend on REL targets and
use them as dump patterns for RELA targets only.
	gas/
	* config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1>
	<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
	<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the
	addend calculated.
	* testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit
	in `bar', export `foo'.
	* testsuite/gas/mips/mips16-branch-absolute.d: Adjust
	accordingly.
	* testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise.
	* testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise.
	* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d:
	Likewise.
	* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d:
	Likewise.
	ld/
	* testsuite/ld-mips-elf/mips16-branch-absolute.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New
	test.
	* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New
	test.
	* testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New
	test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
	from `mips16-branch-absolute' and
	`mips16-branch-absolute-addend', referred indirectly only.
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1>
+       <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
+       <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the
+       addend calculated.
+       * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit
+       in `bar', export `foo'.
+       * testsuite/gas/mips/mips16-branch-absolute.d: Adjust
+       accordingly.
+       * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise.
+       * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise.
+       * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d:
+       Likewise.
+       * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d:
+       Likewise.
+
 2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
 
        * testsuite/gas/mips/mips16-branch-absolute.d: Update patterns.
 
     case BFD_RELOC_MICROMIPS_7_PCREL_S1:
     case BFD_RELOC_MICROMIPS_10_PCREL_S1:
     case BFD_RELOC_MICROMIPS_16_PCREL_S1:
-      /* We adjust the offset back to even.  */
-      if ((*valP & 0x1) != 0)
-       --(*valP);
-
-      if (! fixP->fx_done)
-       break;
-
-      /* Should never visit here, because we keep the relocation.  */
-      abort ();
+      gas_assert (!fixP->fx_done);
       break;
 
     case BFD_RELOC_VTABLE_INHERIT:
 
 Disassembly of section \.text:
        \.\.\.
 [0-9a-f]+ <[^>]*> f000 1000    b       00001004 <foo\+0x4>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 6000    bteqz   00001008 <foo\+0x8>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 6100    btnez   0000100c <foo\+0xc>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 2200    beqz    v0,00001010 <foo\+0x10>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 2a00    bnez    v0,00001014 <foo\+0x14>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> 6500         nop
        \.\.\.
 
 Disassembly of section \.text:
        \.\.\.
 [0-9a-f]+ <[^>]*> f000 1000    b       0000000000001004 <foo\+0x4>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 6000    bteqz   0000000000001008 <foo\+0x8>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 6100    btnez   000000000000100c <foo\+0xc>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 2200    beqz    v0,0000000000001010 <foo\+0x10>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> f000 2a00    bnez    v0,0000000000001014 <foo\+0x14>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a8
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x123468a9
 [0-9a-f]+ <[^>]*> 6500         nop
        \.\.\.
 
 Disassembly of section \.text:
        \.\.\.
 [0-9a-f]+ <[^>]*> f000 1000    b       00001004 <foo\+0x4>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 6000    bteqz   00001008 <foo\+0x8>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 6100    btnez   0000100c <foo\+0xc>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 2200    beqz    v0,00001010 <foo\+0x10>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 2a00    bnez    v0,00001014 <foo\+0x14>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> 6500         nop
        \.\.\.
 
 Disassembly of section \.text:
        \.\.\.
 [0-9a-f]+ <[^>]*> f000 1000    b       0000000000001004 <foo\+0x4>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 6000    bteqz   0000000000001008 <foo\+0x8>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 6100    btnez   000000000000100c <foo\+0xc>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 2200    beqz    v0,0000000000001010 <foo\+0x10>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> f000 2a00    bnez    v0,0000000000001014 <foo\+0x14>
-[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
-[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1230
+[      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
+[      ]*[0-9a-f]+: R_MIPS_NONE        \*ABS\*\+0x1231
 [0-9a-f]+ <[^>]*> 6500         nop
        \.\.\.
 
 
 Disassembly of section \.text:
        \.\.\.
-[0-9a-f]+ <[^>]*> f101 1018    b       00002234 <bar\+0x1000>
+[0-9a-f]+ <[^>]*> f101 1018    b       00002234 <bar\+0xfff>
 [      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*
-[0-9a-f]+ <[^>]*> f101 6018    bteqz   00002238 <bar\+0x1004>
+[0-9a-f]+ <[^>]*> f101 6018    bteqz   00002238 <bar\+0x1003>
 [      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*
-[0-9a-f]+ <[^>]*> f101 6118    btnez   0000223c <bar\+0x1008>
+[0-9a-f]+ <[^>]*> f101 6118    btnez   0000223c <bar\+0x1007>
 [      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*
-[0-9a-f]+ <[^>]*> f101 2218    beqz    v0,00002240 <bar\+0x100c>
+[0-9a-f]+ <[^>]*> f101 2218    beqz    v0,00002240 <bar\+0x100b>
 [      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*
-[0-9a-f]+ <[^>]*> f101 2a18    bnez    v0,00002244 <bar\+0x1010>
+[0-9a-f]+ <[^>]*> f101 2a18    bnez    v0,00002244 <bar\+0x100f>
 [      ]*[0-9a-f]+: R_MIPS16_PC16_S1   \*ABS\*
 [0-9a-f]+ <[^>]*> 6500         nop
        \.\.\.
 
 
        .space  0x1000
 
+       .globl  foo
        .ent    foo
        .set    mips16
 foo:
        .align  4, 0
        .space  16
 
-       .set    bar, 0x1234
+       .set    bar, 0x1235
 
+2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * testsuite/ld-mips-elf/mips16-branch-absolute.d: New test.
+       * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test.
+       * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test.
+       * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New
+       test.
+       * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New
+       test.
+       * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New
+       test.
+       * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
+       from `mips16-branch-absolute' and
+       `mips16-branch-absolute-addend', referred indirectly only.
+
 2016-07-14  Maciej W. Rozycki  <macro@imgtec.com>
 
        * testsuite/ld-mips-elf/branch-absolute.d: New test.
 
 run_dump_test "mips16-branch-3" [list [list ld $abi_ldflags(o32)]]
 run_dump_test "mips16-branch-addend-2" [list [list ld $abi_ldflags(o32)]]
 run_dump_test "mips16-branch-addend-3" [list [list ld $abi_ldflags(o32)]]
+if $has_newabi {
+    run_dump_test "mips16-branch-absolute-n32" \
+                                       [list [list ld $abi_ldflags(n32)]]
+    run_dump_test "mips16-branch-absolute-addend-n32" \
+                                       [list [list ld $abi_ldflags(n32)]]
+    run_dump_test "mips16-branch-absolute-n64" \
+                                       [list [list ld $abi_ldflags(n64)]]
+    run_dump_test "mips16-branch-absolute-addend-n64" \
+                                       [list [list ld $abi_ldflags(n64)]]
+}
 
 run_dump_test "micromips-branch-absolute" [list [list ld $abi_ldflags(o32)]]
 if $has_newabi {
 
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 link branch to absolute expression with addend (n32)
+#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute-addend.s
+#as: -EB -n32 -march=from-abi
+#ld: -EB -Ttext 0x12340000 -e foo
+#dump: mips16-branch-absolute-addend.d
 
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 link branch to absolute expression with addend (n64)
+#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute-addend.s
+#as: -EB -64 -march=from-abi
+#ld: -EB -Ttext 0x12340000 -e foo
+#dump: mips16-branch-absolute-addend.d
 
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 link branch to absolute expression with addend
+#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute-addend.s
+#as: -EB -32
+#ld: -EB -Ttext 0x12340000 -e foo
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+       \.\.\.
+[0-9a-f]+ <[^>]*> f445 1014    b       0*123468ac <bar\+0x1233>
+[0-9a-f]+ <[^>]*> f445 6012    bteqz   0*123468ac <bar\+0x1233>
+[0-9a-f]+ <[^>]*> f445 6110    btnez   0*123468ac <bar\+0x1233>
+[0-9a-f]+ <[^>]*> f445 220e    beqz    v0,0*123468ac <bar\+0x1233>
+[0-9a-f]+ <[^>]*> f445 2a0c    bnez    v0,0*123468ac <bar\+0x1233>
+[0-9a-f]+ <[^>]*> 6500         nop
+       \.\.\.
 
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 link branch to absolute expression (n32)
+#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute.s
+#as: -EB -n32 -march=from-abi
+#ld: -EB -Ttext 0 -e foo
+#dump: mips16-branch-absolute.d
 
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 link branch to absolute expression (n64)
+#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute.s
+#as: -EB -64 -march=from-abi
+#ld: -EB -Ttext 0 -e foo
+#dump: mips16-branch-absolute.d
 
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16 link branch to absolute expression
+#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute.s
+#as: -EB -32
+#ld: -EB -Ttext 0 -e foo
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+       \.\.\.
+[0-9a-f]+ <[^>]*> f100 1018    b       0+001234 <foo\+0x234>
+[0-9a-f]+ <[^>]*> f100 6016    bteqz   0+001234 <foo\+0x234>
+[0-9a-f]+ <[^>]*> f100 6114    btnez   0+001234 <foo\+0x234>
+[0-9a-f]+ <[^>]*> f100 2212    beqz    v0,0+001234 <foo\+0x234>
+[0-9a-f]+ <[^>]*> f100 2a10    bnez    v0,0+001234 <foo\+0x234>
+[0-9a-f]+ <[^>]*> 6500         nop
+       \.\.\.