Avoid x3 (gp), which is now TESTNUM

diff --git a/env b/env
index 497efbd0fa104b70f058ea550ed0c7f8a554662b..286b047fbe29a7c54448c88dac025f78d38681a9 160000 (submodule)
--- a/env
+++ b/env
@@ -1 +1 @@
-Subproject commit 497efbd0fa104b70f058ea550ed0c7f8a554662b
+Subproject commit 286b047fbe29a7c54448c88dac025f78d38681a9

diff --git a/isa/macros/scalar/test_macros.h b/isa/macros/scalar/test_macros.h
index 006f4193a26793501f51032cc4ccce0d0df59d4c..6650fa86533d3bb02dc0c1d37c80f8fadece6c79 100644 (file)
--- a/isa/macros/scalar/test_macros.h
+++ b/isa/macros/scalar/test_macros.h
@@ -44,9 +44,9 @@ test_ ## testnum: \
 #define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
 
 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       li  x1, MASK_XLEN(val1); \
-      inst x3, x1, SEXT_IMM(imm); \
+      inst x30, x1, SEXT_IMM(imm); \
     )
 
 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
@@ -59,20 +59,20 @@ test_ ## testnum: \
     TEST_CASE( testnum, x6, result, \
       li  x4, 0; \
 1:    li  x1, MASK_XLEN(val1); \
-      inst x3, x1, SEXT_IMM(imm); \
+      inst x30, x1, SEXT_IMM(imm); \
       TEST_INSERT_NOPS_ ## nop_cycles \
-      addi  x6, x3, 0; \
+      addi  x6, x30, 0; \
       addi  x4, x4, 1; \
       li  x5, 2; \
       bne x4, x5, 1b \
     )
 
 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       li  x4, 0; \
 1:    li  x1, MASK_XLEN(val1); \
       TEST_INSERT_NOPS_ ## nop_cycles \
-      inst x3, x1, SEXT_IMM(imm); \
+      inst x30, x1, SEXT_IMM(imm); \
       addi  x4, x4, 1; \
       li  x5, 2; \
       bne x4, x5, 1b \
@@ -94,9 +94,9 @@ test_ ## testnum: \
 #-----------------------------------------------------------------------
 
 #define TEST_R_OP( testnum, inst, result, val1 ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       li  x1, val1; \
-      inst x3, x1; \
+      inst x30, x1; \
     )
 
 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
@@ -109,9 +109,9 @@ test_ ## testnum: \
     TEST_CASE( testnum, x6, result, \
       li  x4, 0; \
 1:    li  x1, val1; \
-      inst x3, x1; \
+      inst x30, x1; \
       TEST_INSERT_NOPS_ ## nop_cycles \
-      addi  x6, x3, 0; \
+      addi  x6, x30, 0; \
       addi  x4, x4, 1; \
       li  x5, 2; \
       bne x4, x5, 1b \
@@ -122,10 +122,10 @@ test_ ## testnum: \
 #-----------------------------------------------------------------------
 
 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       li  x1, MASK_XLEN(val1); \
       li  x2, MASK_XLEN(val2); \
-      inst x3, x1, x2; \
+      inst x30, x1, x2; \
     )
 
 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
@@ -153,35 +153,35 @@ test_ ## testnum: \
       li  x4, 0; \
 1:    li  x1, MASK_XLEN(val1); \
       li  x2, MASK_XLEN(val2); \
-      inst x3, x1, x2; \
+      inst x30, x1, x2; \
       TEST_INSERT_NOPS_ ## nop_cycles \
-      addi  x6, x3, 0; \
+      addi  x6, x30, 0; \
       addi  x4, x4, 1; \
       li  x5, 2; \
       bne x4, x5, 1b \
     )
 
 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       li  x4, 0; \
 1:    li  x1, MASK_XLEN(val1); \
       TEST_INSERT_NOPS_ ## src1_nops \
       li  x2, MASK_XLEN(val2); \
       TEST_INSERT_NOPS_ ## src2_nops \
-      inst x3, x1, x2; \
+      inst x30, x1, x2; \
       addi  x4, x4, 1; \
       li  x5, 2; \
       bne x4, x5, 1b \
     )
 
 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       li  x4, 0; \
 1:    li  x2, MASK_XLEN(val2); \
       TEST_INSERT_NOPS_ ## src1_nops \
       li  x1, MASK_XLEN(val1); \
       TEST_INSERT_NOPS_ ## src2_nops \
-      inst x3, x1, x2; \
+      inst x30, x1, x2; \
       addi  x4, x4, 1; \
       li  x5, 2; \
       bne x4, x5, 1b \
@@ -216,17 +216,17 @@ test_ ## testnum: \
 #-----------------------------------------------------------------------
 
 #define TEST_LD_OP( testnum, inst, result, offset, base ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       la  x1, base; \
-      inst x3, offset(x1); \
+      inst x30, offset(x1); \
     )
 
 #define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
-    TEST_CASE( testnum, x3, result, \
+    TEST_CASE( testnum, x30, result, \
       la  x1, base; \
       li  x2, result; \
       store_inst x2, offset(x1); \
-      load_inst x3, offset(x1); \
+      load_inst x30, offset(x1); \
     )
 
 #define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
@@ -234,9 +234,9 @@ test_ ## testnum: \
     li  TESTNUM, testnum; \
     li  x4, 0; \
 1:  la  x1, base; \
-    inst x3, offset(x1); \
+    inst x30, offset(x1); \
     TEST_INSERT_NOPS_ ## nop_cycles \
-    addi  x6, x3, 0; \
+    addi  x6, x30, 0; \
     li  x29, result; \
     bne x6, x29, fail; \
     addi  x4, x4, 1; \
@@ -249,9 +249,9 @@ test_ ## testnum: \
     li  x4, 0; \
 1:  la  x1, base; \
     TEST_INSERT_NOPS_ ## nop_cycles \
-    inst x3, offset(x1); \
+    inst x30, offset(x1); \
     li  x29, result; \
-    bne x3, x29, fail; \
+    bne x30, x29, fail; \
     addi  x4, x4, 1; \
     li  x5, 2; \
     bne x4, x5, 1b \
@@ -265,9 +265,9 @@ test_ ## testnum: \
     la  x2, base; \
     TEST_INSERT_NOPS_ ## src2_nops \
     store_inst x1, offset(x2); \
-    load_inst x3, offset(x2); \
+    load_inst x30, offset(x2); \
     li  x29, result; \
-    bne x3, x29, fail; \
+    bne x30, x29, fail; \
     addi  x4, x4, 1; \
     li  x5, 2; \
     bne x4, x5, 1b \
@@ -281,9 +281,9 @@ test_ ## testnum: \
     li  x1, result; \
     TEST_INSERT_NOPS_ ## src2_nops \
     store_inst x1, offset(x2); \
-    load_inst x3, offset(x2); \
+    load_inst x30, offset(x2); \
     li  x29, result; \
-    bne x3, x29, fail; \
+    bne x30, x29, fail; \
     addi  x4, x4, 1; \
     li  x5, 2; \
     bne x4, x5, 1b \

diff --git a/isa/rv64ud/structural.S b/isa/rv64ud/structural.S
index 76c66912b74f4c7b76c4accee1c90b1a4d48cc5d..5ecbb96d672d271ae309260000be4f6d5fefb67d 100644 (file)
--- a/isa/rv64ud/structural.S
+++ b/isa/rv64ud/structural.S
@@ -30,8 +30,8 @@ li x1, 0x3F800000
   nops          ;\
   fsgnj.s f3, f1, f1 ;\
   fmv.x.d  x4, f4    ;\
-  fmv.x.s  x3, f3    ;\
-  beq     x1, x3, 2f  ;\
+  fmv.x.s  x5, f3    ;\
+  beq     x1, x5, 2f  ;\
   RVTEST_FAIL ;\
 2:beq     x2, x4, 2f  ;\
   RVTEST_FAIL; \

diff --git a/isa/rv64ui/jal.S b/isa/rv64ui/jal.S
index f7f299d210277694f5a9056db6eb1ef770386c53..00c65d8add5a2669186f25301a37996e677f96d2 100644 (file)
--- a/isa/rv64ui/jal.S
+++ b/isa/rv64ui/jal.S
@@ -21,7 +21,7 @@ test_2:
   li  TESTNUM, 2
   li  ra, 0
 
-  jal x3, target_2
+  jal x4, target_2
 linkaddr_2:
   nop
   nop
@@ -30,7 +30,7 @@ linkaddr_2:
 
 target_2:
   la  x2, linkaddr_2
-  bne x2, x3, fail
+  bne x2, x4, fail
 
   #-------------------------------------------------------------
   # Test delay slot instructions not executed nor bypassed

diff --git a/isa/rv64ui/lb.S b/isa/rv64ui/lb.S
index 277b03eeb8ddcbf339821edb8314fc99719b6a07..856dfe9454372750bd3cbc0d43b4401e980204e7 100644 (file)
--- a/isa/rv64ui/lb.S
+++ b/isa/rv64ui/lb.S
@@ -31,18 +31,18 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0xffffffffffffffff, \
+  TEST_CASE( 10, x5, 0xffffffffffffffff, \
     la  x1, tdat; \
     addi x1, x1, -32; \
-    lb x3, 32(x1); \
+    lb x5, 32(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0x0000000000000000, \
+  TEST_CASE( 11, x5, 0x0000000000000000, \
     la  x1, tdat; \
     addi x1, x1, -6; \
-    lb x3, 7(x1); \
+    lb x5, 7(x1); \
   )
 
   #-------------------------------------------------------------
@@ -62,14 +62,14 @@ RVTEST_CODE_BEGIN
   #-------------------------------------------------------------
 
   TEST_CASE( 18, x2, 2, \
-    la  x3, tdat; \
-    lb  x2, 0(x3); \
+    la  x5, tdat; \
+    lb  x2, 0(x5); \
     li  x2, 2; \
   )
 
   TEST_CASE( 19, x2, 2, \
-    la  x3, tdat; \
-    lb  x2, 0(x3); \
+    la  x5, tdat; \
+    lb  x2, 0(x5); \
     nop; \
     li  x2, 2; \
   )

diff --git a/isa/rv64ui/lbu.S b/isa/rv64ui/lbu.S
index 5f4c2fea80431d2c510cb3b9cb3bb58049b21640..adc3a05e3d37e9e416a8561df722a7db5a7c3502 100644 (file)
--- a/isa/rv64ui/lbu.S
+++ b/isa/rv64ui/lbu.S
@@ -31,18 +31,18 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x00000000000000ff, \
+  TEST_CASE( 10, x5, 0x00000000000000ff, \
     la  x1, tdat; \
     addi x1, x1, -32; \
-    lbu x3, 32(x1); \
+    lbu x5, 32(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0x0000000000000000, \
+  TEST_CASE( 11, x5, 0x0000000000000000, \
     la  x1, tdat; \
     addi x1, x1, -6; \
-    lbu x3, 7(x1); \
+    lbu x5, 7(x1); \
   )
 
   #-------------------------------------------------------------
@@ -62,14 +62,14 @@ RVTEST_CODE_BEGIN
   #-------------------------------------------------------------
 
   TEST_CASE( 18, x2, 2, \
-    la  x3, tdat; \
-    lbu  x2, 0(x3); \
+    la  x5, tdat; \
+    lbu  x2, 0(x5); \
     li  x2, 2; \
   )
 
   TEST_CASE( 19, x2, 2, \
-    la  x3, tdat; \
-    lbu  x2, 0(x3); \
+    la  x5, tdat; \
+    lbu  x2, 0(x5); \
     nop; \
     li  x2, 2; \
   )

diff --git a/isa/rv64ui/ld.S b/isa/rv64ui/ld.S
index 62fe4e58c705dc1ce6cf8042887d84ac8ca9e27d..948c34b5e155cc47895061dae8e5fd6439bc8bd7 100644 (file)
--- a/isa/rv64ui/ld.S
+++ b/isa/rv64ui/ld.S
@@ -31,18 +31,18 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x00ff00ff00ff00ff, \
+  TEST_CASE( 10, x5, 0x00ff00ff00ff00ff, \
     la  x1, tdat; \
     addi x1, x1, -32; \
-    ld x3, 32(x1); \
+    ld x5, 32(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0xff00ff00ff00ff00, \
+  TEST_CASE( 11, x5, 0xff00ff00ff00ff00, \
     la  x1, tdat; \
     addi x1, x1, -3; \
-    ld x3, 11(x1); \
+    ld x5, 11(x1); \
   )
 
   #-------------------------------------------------------------
@@ -62,14 +62,14 @@ RVTEST_CODE_BEGIN
   #-------------------------------------------------------------
 
   TEST_CASE( 18, x2, 2, \
-    la  x3, tdat; \
-    ld  x2, 0(x3); \
+    la  x5, tdat; \
+    ld  x2, 0(x5); \
     li  x2, 2; \
   )
 
   TEST_CASE( 19, x2, 2, \
-    la  x3, tdat; \
-    ld  x2, 0(x3); \
+    la  x5, tdat; \
+    ld  x2, 0(x5); \
     nop; \
     li  x2, 2; \
   )

diff --git a/isa/rv64ui/lh.S b/isa/rv64ui/lh.S
index decacdab2eb159368857891ba991ea096967de7c..338ed69bcf974a51114f4f6bd3e1f2a65c0120a4 100644 (file)
--- a/isa/rv64ui/lh.S
+++ b/isa/rv64ui/lh.S
@@ -31,18 +31,18 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x00000000000000ff, \
+  TEST_CASE( 10, x5, 0x00000000000000ff, \
     la  x1, tdat; \
     addi x1, x1, -32; \
-    lh x3, 32(x1); \
+    lh x5, 32(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0xffffffffffffff00, \
+  TEST_CASE( 11, x5, 0xffffffffffffff00, \
     la  x1, tdat; \
     addi x1, x1, -5; \
-    lh x3, 7(x1); \
+    lh x5, 7(x1); \
   )
 
   #-------------------------------------------------------------
@@ -62,14 +62,14 @@ RVTEST_CODE_BEGIN
   #-------------------------------------------------------------
 
   TEST_CASE( 18, x2, 2, \
-    la  x3, tdat; \
-    lh  x2, 0(x3); \
+    la  x5, tdat; \
+    lh  x2, 0(x5); \
     li  x2, 2; \
   )
 
   TEST_CASE( 19, x2, 2, \
-    la  x3, tdat; \
-    lh  x2, 0(x3); \
+    la  x5, tdat; \
+    lh  x2, 0(x5); \
     nop; \
     li  x2, 2; \
   )

diff --git a/isa/rv64ui/lhu.S b/isa/rv64ui/lhu.S
index 5a55724d4b3389fd25af27734fc119936e009674..a4cc49bada1fe5470c685053f6ac5a71916fedde 100644 (file)
--- a/isa/rv64ui/lhu.S
+++ b/isa/rv64ui/lhu.S
@@ -31,18 +31,18 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x00000000000000ff, \
+  TEST_CASE( 10, x5, 0x00000000000000ff, \
     la  x1, tdat; \
     addi x1, x1, -32; \
-    lhu x3, 32(x1); \
+    lhu x5, 32(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0x000000000000ff00, \
+  TEST_CASE( 11, x5, 0x000000000000ff00, \
     la  x1, tdat; \
     addi x1, x1, -5; \
-    lhu x3, 7(x1); \
+    lhu x5, 7(x1); \
   )
 
   #-------------------------------------------------------------
@@ -62,14 +62,14 @@ RVTEST_CODE_BEGIN
   #-------------------------------------------------------------
 
   TEST_CASE( 18, x2, 2, \
-    la  x3, tdat; \
-    lhu  x2, 0(x3); \
+    la  x5, tdat; \
+    lhu  x2, 0(x5); \
     li  x2, 2; \
   )
 
   TEST_CASE( 19, x2, 2, \
-    la  x3, tdat; \
-    lhu  x2, 0(x3); \
+    la  x5, tdat; \
+    lhu  x2, 0(x5); \
     nop; \
     li  x2, 2; \
   )

diff --git a/isa/rv64ui/lw.S b/isa/rv64ui/lw.S
index 02a12c097731d534e3d591b4597a34007e71c696..40a73f18cb479f2b09b6bd47c7ecfc2ff3d151e5 100644 (file)
--- a/isa/rv64ui/lw.S
+++ b/isa/rv64ui/lw.S
@@ -31,18 +31,18 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x0000000000ff00ff, \
+  TEST_CASE( 10, x5, 0x0000000000ff00ff, \
     la  x1, tdat; \
     addi x1, x1, -32; \
-    lw x3, 32(x1); \
+    lw x5, 32(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0xffffffffff00ff00, \
+  TEST_CASE( 11, x5, 0xffffffffff00ff00, \
     la  x1, tdat; \
     addi x1, x1, -3; \
-    lw x3, 7(x1); \
+    lw x5, 7(x1); \
   )
 
   #-------------------------------------------------------------
@@ -62,14 +62,14 @@ RVTEST_CODE_BEGIN
   #-------------------------------------------------------------
 
   TEST_CASE( 18, x2, 2, \
-    la  x3, tdat; \
-    lw  x2, 0(x3); \
+    la  x5, tdat; \
+    lw  x2, 0(x5); \
     li  x2, 2; \
   )
 
   TEST_CASE( 19, x2, 2, \
-    la  x3, tdat; \
-    lw  x2, 0(x3); \
+    la  x5, tdat; \
+    lw  x2, 0(x5); \
     nop; \
     li  x2, 2; \
   )

diff --git a/isa/rv64ui/lwu.S b/isa/rv64ui/lwu.S
index 1ca17b141b074d6db377f90d739985935cee1ef8..9f7cf67ea86db2e10688b65c92c9da71b9487da0 100644 (file)
--- a/isa/rv64ui/lwu.S
+++ b/isa/rv64ui/lwu.S
@@ -31,18 +31,18 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x0000000000ff00ff, \
+  TEST_CASE( 10, x5, 0x0000000000ff00ff, \
     la  x1, tdat; \
     addi x1, x1, -32; \
-    lwu x3, 32(x1); \
+    lwu x5, 32(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0x00000000ff00ff00, \
+  TEST_CASE( 11, x5, 0x00000000ff00ff00, \
     la  x1, tdat; \
     addi x1, x1, -3; \
-    lwu x3, 7(x1); \
+    lwu x5, 7(x1); \
   )
 
   #-------------------------------------------------------------
@@ -62,14 +62,14 @@ RVTEST_CODE_BEGIN
   #-------------------------------------------------------------
 
   TEST_CASE( 18, x2, 2, \
-    la  x3, tdat; \
-    lwu x2, 0(x3); \
+    la  x5, tdat; \
+    lwu x2, 0(x5); \
     li  x2, 2; \
   )
 
   TEST_CASE( 19, x2, 2, \
-    la  x3, tdat; \
-    lwu x2, 0(x3); \
+    la  x5, tdat; \
+    lwu x2, 0(x5); \
     nop; \
     li  x2, 2; \
   )

diff --git a/isa/rv64ui/sb.S b/isa/rv64ui/sb.S
index 17ab2e2f6bd2caa592564f742ec20b2e7fa83c64..19e32d640337da9faf55bf3fc320ff19660923f2 100644 (file)
--- a/isa/rv64ui/sb.S
+++ b/isa/rv64ui/sb.S
@@ -31,23 +31,23 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x78, \
+  TEST_CASE( 10, x5, 0x78, \
     la  x1, tdat9; \
     li  x2, 0x12345678; \
     addi x4, x1, -32; \
     sb x2, 32(x4); \
-    lb x3, 0(x1); \
+    lb x5, 0(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0xffffffffffffff98, \
+  TEST_CASE( 11, x5, 0xffffffffffffff98, \
     la  x1, tdat9; \
     li  x2, 0x00003098; \
     addi x1, x1, -6; \
     sb x2, 7(x1); \
     la  x4, tdat10; \
-    lb x3, 0(x4); \
+    lb x5, 0(x4); \
   )
 
   #-------------------------------------------------------------

diff --git a/isa/rv64ui/sd.S b/isa/rv64ui/sd.S
index f9d83b7b46cca717fd4914c3c26a6adf98008f7d..b6fd66da4a216644626670bcd47eac9921bb0b25 100644 (file)
--- a/isa/rv64ui/sd.S
+++ b/isa/rv64ui/sd.S
@@ -31,23 +31,23 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x1234567812345678, \
+  TEST_CASE( 10, x5, 0x1234567812345678, \
     la  x1, tdat9; \
     li  x2, 0x1234567812345678; \
     addi x4, x1, -32; \
     sd x2, 32(x4); \
-    ld x3, 0(x1); \
+    ld x5, 0(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0x5821309858213098, \
+  TEST_CASE( 11, x5, 0x5821309858213098, \
     la  x1, tdat9; \
     li  x2, 0x5821309858213098; \
     addi x1, x1, -3; \
     sd x2, 11(x1); \
     la  x4, tdat10; \
-    ld x3, 0(x4); \
+    ld x5, 0(x4); \
   )
 
   #-------------------------------------------------------------

diff --git a/isa/rv64ui/sh.S b/isa/rv64ui/sh.S
index 10897d432857bb6135376bd596cef2ede46f858c..ea9eb2388ff12de8f971e644f49456badb0863e6 100644 (file)
--- a/isa/rv64ui/sh.S
+++ b/isa/rv64ui/sh.S
@@ -31,23 +31,23 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x5678, \
+  TEST_CASE( 10, x5, 0x5678, \
     la  x1, tdat9; \
     li  x2, 0x12345678; \
     addi x4, x1, -32; \
     sh x2, 32(x4); \
-    lh x3, 0(x1); \
+    lh x5, 0(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0x3098, \
+  TEST_CASE( 11, x5, 0x3098, \
     la  x1, tdat9; \
     li  x2, 0x00003098; \
     addi x1, x1, -5; \
     sh x2, 7(x1); \
     la  x4, tdat10; \
-    lh x3, 0(x4); \
+    lh x5, 0(x4); \
   )
 
   #-------------------------------------------------------------

diff --git a/isa/rv64ui/sw.S b/isa/rv64ui/sw.S
index 86b62fcc0fbdeb3830794d06212fea3c40f3bd15..ab094b3dbb46903c9eff349e00ad258760be50b7 100644 (file)
--- a/isa/rv64ui/sw.S
+++ b/isa/rv64ui/sw.S
@@ -31,23 +31,23 @@ RVTEST_CODE_BEGIN
 
   # Test with a negative base
 
-  TEST_CASE( 10, x3, 0x12345678, \
+  TEST_CASE( 10, x5, 0x12345678, \
     la  x1, tdat9; \
     li  x2, 0x12345678; \
     addi x4, x1, -32; \
     sw x2, 32(x4); \
-    lw x3, 0(x1); \
+    lw x5, 0(x1); \
   )
 
   # Test with unaligned base
 
-  TEST_CASE( 11, x3, 0x58213098, \
+  TEST_CASE( 11, x5, 0x58213098, \
     la  x1, tdat9; \
     li  x2, 0x58213098; \
     addi x1, x1, -3; \
     sw x2, 7(x1); \
     la  x4, tdat10; \
-    lw x3, 0(x4); \
+    lw x5, 0(x4); \
   )
 
   #-------------------------------------------------------------