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author
Eddie Hung
<eddie@fpgeh.com>
Wed, 21 Aug 2019 00:51:50 +0000
(17:51 -0700)
committer
Eddie Hung
<eddie@fpgeh.com>
Wed, 21 Aug 2019 00:51:50 +0000
(17:51 -0700)
techlibs/xilinx/abc_map.v
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diff --git
a/techlibs/xilinx/abc_map.v
b/techlibs/xilinx/abc_map.v
index 56b4fe7f9b6ce8c130ef263c718c95eb29c8adf1..dc5032d232382c5347c16cbce48d0c1077fc9d98 100644
(file)
--- a/
techlibs/xilinx/abc_map.v
+++ b/
techlibs/xilinx/abc_map.v
@@
-165,7
+165,7
@@
module RAM64X1D (
\$__ABC_LUTMUX6 spo (.A(\$SPO ), .S({A0, A1, A2, A3, A4, A5}), .Y(SPO));
endmodule
-module
\$__ABC_
RAM128X1D (
+module RAM128X1D (
output DPO, SPO,
input D,
input WCLK,