radeonsi/nir: add prim_mask to the abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index bcacd4953f46a5b9c51d99431733dfc129db0e9c..e4963dc359310f4c172801506f9c1838822a419c 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -123,7 +123,6 @@ struct nir_to_llvm_context {
        LLVMValueRef hs_ring_tess_offchip;
        LLVMValueRef hs_ring_tess_factor;
 
-       LLVMValueRef prim_mask;
        LLVMValueRef sample_pos_offset;
        LLVMValueRef persp_sample, persp_center, persp_centroid;
        LLVMValueRef linear_sample, linear_center, linear_centroid;
@@ -1005,7 +1004,7 @@ static void create_function(struct nir_to_llvm_context *ctx,
                        add_arg(&args, ARG_SGPR, ctx->ac.i32,
                                &ctx->sample_pos_offset);
 
-               add_arg(&args, ARG_SGPR, ctx->ac.i32, &ctx->prim_mask);
+               add_arg(&args, ARG_SGPR, ctx->ac.i32, &ctx->abi.prim_mask);
                add_arg(&args, ARG_VGPR, ctx->ac.v2i32, &ctx->persp_sample);
                add_arg(&args, ARG_VGPR, ctx->ac.v2i32, &ctx->persp_center);
                add_arg(&args, ARG_VGPR, ctx->ac.v2i32, &ctx->persp_centroid);
@@ -4146,12 +4145,12 @@ static LLVMValueRef visit_interp(struct nir_to_llvm_context *ctx,
 
                        result[chan] = ac_build_fs_interp(&ctx->ac,
                                                          llvm_chan, attr_number,
-                                                         ctx->prim_mask, i, j);
+                                                         ctx->abi.prim_mask, i, j);
                } else {
                        result[chan] = ac_build_fs_interp_mov(&ctx->ac,
                                                              LLVMConstInt(ctx->ac.i32, 2, false),
                                                              llvm_chan, attr_number,
-                                                             ctx->prim_mask);
+                                                             ctx->abi.prim_mask);
                }
        }
        return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
@@ -5464,7 +5463,7 @@ prepare_interp_optimize(struct nir_to_llvm_context *ctx,
        }
 
        if (uses_center && uses_centroid) {
-               LLVMValueRef sel = LLVMBuildICmp(ctx->builder, LLVMIntSLT, ctx->prim_mask, ctx->ac.i32_0, "");
+               LLVMValueRef sel = LLVMBuildICmp(ctx->builder, LLVMIntSLT, ctx->abi.prim_mask, ctx->ac.i32_0, "");
                ctx->persp_centroid = LLVMBuildSelect(ctx->builder, sel, ctx->persp_center, ctx->persp_centroid, "");
                ctx->linear_centroid = LLVMBuildSelect(ctx->builder, sel, ctx->linear_center, ctx->linear_centroid, "");
        }
@@ -5495,7 +5494,7 @@ handle_fs_inputs(struct nir_to_llvm_context *ctx,
                if (i >= VARYING_SLOT_VAR0 || i == VARYING_SLOT_PNTC ||
                    i == VARYING_SLOT_PRIMITIVE_ID || i == VARYING_SLOT_LAYER) {
                        interp_param = *inputs;
-                       interp_fs_input(ctx, index, interp_param, ctx->prim_mask,
+                       interp_fs_input(ctx, index, interp_param, ctx->abi.prim_mask,
                                        inputs);
 
                        if (!interp_param)

diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 409b49a6cd79104212c937c77e8ef28512371ac5..9cdfd9d1dfc6472c97f85f184be4e097b24d98bc 100644 (file)
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -53,6 +53,7 @@ struct ac_shader_abi {
        LLVMValueRef front_face;
        LLVMValueRef ancillary;
        LLVMValueRef sample_coverage;
+       LLVMValueRef prim_mask;
 
        /* For VS and PS: pre-loaded shader inputs.
         *

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 71a8733780c2328562ad6c5709a51f6b128650f5..dfec070d33ec84e258d4bbf46ca8f64362914b4f 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1848,7 +1848,7 @@ void si_llvm_load_input_fs(
        interp_fs_input(ctx, input_index, semantic_name,
                        semantic_index, 0, /* this param is unused */
                        shader->selector->info.colors_read, interp_param,
-                       LLVMGetParam(main_fn, SI_PARAM_PRIM_MASK),
+                       ctx->abi.prim_mask,
                        LLVMGetParam(main_fn, SI_PARAM_FRONT_FACE),
                        &out[0]);
 }
@@ -4076,7 +4076,7 @@ static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
        int input_base, input_array_size;
        int chan;
        int i;
-       LLVMValueRef prim_mask = LLVMGetParam(ctx->main_fn, SI_PARAM_PRIM_MASK);
+       LLVMValueRef prim_mask = ctx->abi.prim_mask;
        LLVMValueRef array_idx;
        int interp_param_idx;
        unsigned interp;
@@ -4879,7 +4879,8 @@ static void create_function(struct si_shader_context *ctx)
                declare_global_desc_pointers(ctx, &fninfo);
                declare_per_stage_desc_pointers(ctx, &fninfo, true);
                add_arg_checked(&fninfo, ARG_SGPR, ctx->f32, SI_PARAM_ALPHA_REF);
-               add_arg_checked(&fninfo, ARG_SGPR, ctx->i32, SI_PARAM_PRIM_MASK);
+               add_arg_assign_checked(&fninfo, ARG_SGPR, ctx->i32,
+                                      &ctx->abi.prim_mask, SI_PARAM_PRIM_MASK);
 
                add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32, SI_PARAM_PERSP_SAMPLE);
                add_arg_checked(&fninfo, ARG_VGPR, ctx->v2i32, SI_PARAM_PERSP_CENTER);