S/390: Load and test peephole.
authorDominik Vogt <vogt@linux.vnet.ibm.com>
Tue, 25 Apr 2017 07:33:05 +0000 (07:33 +0000)
committerAndreas Krebbel <krebbel@gcc.gnu.org>
Tue, 25 Apr 2017 07:33:05 +0000 (07:33 +0000)
gcc/ChangeLog:

2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>

* config/s390/s390.md (define_peephole2): New peephole to help
combining the load-and-test pattern with volatile memory.

From-SVN: r247131

gcc/ChangeLog
gcc/config/s390/s390.md

index 2f2365b0b18825b93d38bcffe3d9528bc789a55d..7106442a8c47334157c50bd656b6f07f803ec133 100644 (file)
@@ -1,3 +1,8 @@
+2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+       * config/s390/s390.md (define_peephole2): New peephole to help
+       combining the load-and-test pattern with volatile memory.
+
 2017-04-25  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 
        * config/s390/s390.md ("cstorecc4"): Use load-on-condition and deal
index 6a1cab6947aee2fe5e65f9e3be3766d5a6a84947..9baafccdf5a2394c12875dbc5ae2820eb5658a8a 100644 (file)
   [(set_attr "op_type" "RR<E>,RXY")
    (set_attr "z10prop" "z10_fr_E1,z10_fwd_A3") ])
 
+; Peephole to combine a load-and-test from volatile memory which combine does
+; not do.
+(define_peephole2
+  [(set (match_operand:GPR 0 "register_operand")
+       (match_operand:GPR 2 "memory_operand"))
+   (set (reg CC_REGNUM)
+       (compare (match_dup 0) (match_operand:GPR 1 "const0_operand")))]
+  "s390_match_ccmode(insn, CCSmode) && TARGET_EXTIMM
+   && GENERAL_REG_P (operands[0])
+   && satisfies_constraint_T (operands[2])"
+  [(parallel
+    [(set (reg:CCS CC_REGNUM)
+         (compare:CCS (match_dup 2) (match_dup 1)))
+     (set (match_dup 0) (match_dup 2))])])
+
 ; ltr, lt, ltgr, ltg
 (define_insn "*tst<mode>_cconly_extimm"
   [(set (reg CC_REGNUM)