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radeonsi: restore si_emit_cache_flush call at the end of IBs
author
Marek Olšák
<marek.olsak@amd.com>
Sat, 14 Apr 2018 00:04:04 +0000
(20:04 -0400)
committer
Marek Olšák
<marek.olsak@amd.com>
Sat, 14 Apr 2018 00:05:53 +0000
(20:05 -0400)
Fixes: 918b798668c "radeonsi: make sure CP DMA is idle at the end of IBs"
src/gallium/drivers/radeonsi/si_gfx_cs.c
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diff --git
a/src/gallium/drivers/radeonsi/si_gfx_cs.c
b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 2d5e510b19e50a58b8bead4784acaa63d14674cc..b1ed620b0c651ea0e817afff4c7bcdb83c629c44 100644
(file)
--- a/
src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/
src/gallium/drivers/radeonsi/si_gfx_cs.c
@@
-116,6
+116,8
@@
void si_flush_gfx_cs(struct si_context *ctx, unsigned flags,
if (ctx->chip_class >= CIK)
si_cp_dma_wait_for_idle(ctx);
+ si_emit_cache_flush(ctx);
+
if (ctx->current_saved_cs) {
si_trace_emit(ctx);
si_log_hw_flush(ctx);