Power: The condition register should be set or cleared upon a system call
authorTimothy M. Jones <tjones1@inf.ed.ac.uk>
Thu, 22 Jul 2010 17:54:37 +0000 (18:54 +0100)
committerTimothy M. Jones <tjones1@inf.ed.ac.uk>
Thu, 22 Jul 2010 17:54:37 +0000 (18:54 +0100)
return to indicate success or failure.

src/arch/power/miscregs.hh
src/arch/power/process.cc

index cd9815b2a75be7ec9ef986f2181f514486c2fe47..34732dad15cb72f09b8482d0d2dc7d65182ac67b 100644 (file)
@@ -44,7 +44,12 @@ const char * const miscRegName[NUM_MISCREGS] = {
 };
 
 BitUnion32(Cr)
-    Bitfield<31,28> cr0;
+    SubBitUnion(cr0, 31, 28)
+        Bitfield<31> lt;
+        Bitfield<30> gt;
+        Bitfield<29> eq;
+        Bitfield<28> so;
+    EndSubBitUnion(cr0)
     Bitfield<27,24> cr1;
 EndBitUnion(Cr)
 
index 92f993e4c756d523b1f16f6bfb3c22a9c8c9f4ea..12b216e500f9253b26492894132c66e029cbfc3e 100644 (file)
@@ -284,5 +284,12 @@ void
 PowerLiveProcess::setSyscallReturn(ThreadContext *tc,
         SyscallReturn return_value)
 {
+    Cr cr = tc->readIntReg(INTREG_CR);
+    if (return_value.successful()) {
+        cr.cr0.so = 0;
+    } else {
+        cr.cr0.so = 1;
+    }
+    tc->setIntReg(INTREG_CR, cr);
     tc->setIntReg(ReturnValueReg, return_value.value());
 }