added english language description for lwasx instruction

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index 903019cd7094ffac1a385e31a72a0a15a8337d71..8e61cdbd5534e4337ee58c53ae9983ef48d9b0b5 100644 (file)
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -230,7 +230,6 @@ Description:
 
     If RA=0 or RA=RT, the instruction form is invalid.
 
-
 Special Registers Altered:
 
     None
@@ -247,6 +246,14 @@ Pseudo-code:
     EA <- b + (RB) << (SH+1)
     RT <- EXTS(MEM(EA, 4))
 
+Description:
+
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and (RA|0).
+
+    The word in storage addressed by EA is loaded into RT[32:63].
+    RT[0:31] are filled with a copy of bit 0 of the loaded word.
+
 Special Registers Altered:
 
     None