[PATCH][AARCH64]Fix immediate alternative of movhf_aarch64 pattern.

gcc/

2018-03-12  Renlin Li  <renlin.li@arm.com>

    * config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
    aarch64_output_scalar_simd_mov_immediate.

gcc/testsuite/

2018-03-12  Renlin Li  <renlin.li@arm.com>

    * gcc.target/aarch64/movi_hf.c: New.
    * gcc.target/aarch64/f16_mov_immediate_1.c: Update.
    * gcc.target/aarch64/f16_mov_immediate_2.c: Update.

From-SVN: r258459

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bc771c64a6148bfa7b2f3d3d7bcaffa8b45c6d96..9f64809d75d173ff3a77fa5fccb843566b04d4f8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-03-12  Renlin Li  <renlin.li@arm.com>
+
+       * config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
+       aarch64_output_scalar_simd_mov_immediate.
+
 2018-03-12  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/83456

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 5b879fa3906b7338c54c622ae8cc8fe2560bfa7e..417ea352867ad786134fb6fd492a4e161b0b9f4c 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1145,7 +1145,7 @@
    umov\\t%w0, %1.h[0]
    mov\\t%0.h[0], %1.h[0]
    fmov\\t%h0, %1
-   * return aarch64_output_scalar_simd_mov_immediate (operands[1], SImode);
+   * return aarch64_output_scalar_simd_mov_immediate (operands[1], HImode);
    ldr\\t%h0, %1
    str\\t%h1, %0
    ldrh\\t%w0, %1

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a5e3408c4c4d28b6b47b2814a23a0f13ad038610..5880171b336071c100c3988682fb9a8a8042fa70 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2018-03-12  Renlin Li  <renlin.li@arm.com>
+
+       * gcc.target/aarch64/movi_hf.c: New.
+       * gcc.target/aarch64/f16_mov_immediate_1.c: Update.
+       * gcc.target/aarch64/f16_mov_immediate_2.c: Update.
+
 2018-03-12  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/83456
@@ -5,13 +11,6 @@
        * c-c++-common/Wrestrict.c: Same.
        * gcc.dg/Wrestrict-12.c: New test.
        * gcc.dg/Wrestrict-14.c: New test.
-Index: gcc/c-family/c-common.c
-===================================================================
---- gcc/c-family/c-common.c    (revision 258366)
-+++ gcc/c-family/c-common.c    (working copy)
-@@ -5309,10 +5309,11 @@ check_function_sentinel (const_tree fntype, int na
-     }
- }
 
 2018-03-12  H.J. Lu  <hongjiu.lu@intel.com>
 

diff --git a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
index 1ed3831e139745227487eafa3ccfdc05c99deb34..3d22d225851af653f17e04ce7c7cc65ee1c86172 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_1.c
@@ -45,5 +45,5 @@ __fp16 f5 ()
 }
 
 /* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, #?19520"           3 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0xbc, lsl 8"  1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x4c, lsl 8"  1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0xbc, lsl 8"  1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x4c, lsl 8"  1 } } */

diff --git a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c
index 6f44821e9d08d4c3b87eb52b70491183a32ac2ff..81ebd581fb2d6532dfc0c302fb97e9e5520b5eb3 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_2.c
@@ -36,9 +36,9 @@ float16_t f3(void)
 }
 
 /* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, ?#0"         1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x80, lsl 8" 1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x5c, lsl 8" 1 } } */
-/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.2s, 0x7c, lsl 8" 1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x80, lsl 8" 1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x5c, lsl 8" 1 } } */
+/* { dg-final { scan-assembler-times "movi\tv\[0-9\]+\\\.4h, 0x7c, lsl 8" 1 } } */
 
 /* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, 19520"              1 } } */
 /* { dg-final { scan-assembler-times "fmov\th\[0-9\], w\[0-9\]+"          1 } } */

diff --git a/gcc/testsuite/gcc.target/aarch64/movi_hf.c b/gcc/testsuite/gcc.target/aarch64/movi_hf.c
new file mode 100644 (file)
index 0000000..9521b9b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/movi_hf.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -std=c99" } */
+
+__fp16
+foo ()
+{
+  /* { dg-final { scan-assembler "movi\tv\[0-9\]+\.8b" } } */
+  return 0x1.544p5;
+}