{"fdb", cons, 2},
{"fcc", stringer, 1},
{"rmb", s_space, 0},
+
+ /* Dwarf2 support for Gcc. */
{"file", dwarf2_directive_file, 0},
{"loc", dwarf2_directive_loc, 0},
return 0;
}
+/* Listing header selected according to cpu. */
+const char *
+m68hc11_listing_header ()
+{
+ if (current_architecture & cpu6811)
+ return "M68HC11 GAS ";
+ else
+ return "M68HC12 GAS ";
+}
+
void
md_show_usage (stream)
FILE *stream;
get_default_target ();
switch (c)
{
- /* -S means keep external to 2 bits offset rather than 16 bits one. */
+ /* -S means keep external to 2 bit offset rather than 16 bit one. */
case OPTION_SHORT_BRANCHS:
case 'S':
flag_fixed_branchs = 1;
if (mode & M6812_AUTO_INC_DEC)
return (num != 0 && num <= 8 && num >= -8);
- /* The 68HC12 supports 5, 9 and 16-bits offsets. */
+ /* The 68HC12 supports 5, 9 and 16-bit offsets. */
if (mode & (M6812_INDEXED_IND | M6812_INDEXED | M6812_OP_IDX))
mode = M6811_OP_IND16;
}
}
-/* Put a 2 bytes expression described by 'oper'. If this expression contains
+/* Put a 2 byte expression described by 'oper'. If this expression contains
unresolved symbols, generate a 16-bit fixup. */
static void
fixup16 (oper, mode, opmode)
int jmp_mode;
{
unsigned char code;
- int insn_size;
char *f;
unsigned long n;
assert (operands[0].reg1 == REG_NONE && operands[0].reg2 == REG_NONE);
code = opcode->opcode;
- insn_size = 1;
n = operands[0].exp.X_add_number;
int jmp_mode;
{
unsigned char code;
- int insn_size;
char *f;
unsigned long n;
assert (operands[0].reg1 != REG_NONE);
code = opcode->opcode & 0x0FF;
- insn_size = 1;
f = m68hc11_new_insn (1);
number_to_chars_bigendian (f, code, 1);
{
int i;
char *f;
- int insn_size = 1;
long format;
int move_insn = 0;
number_to_chars_bigendian (f, page_code, 1);
f++;
- insn_size = 2;
}
else
f = m68hc11_new_insn (1);
move_insn = 1;
if (format & M6812_OP_IDX)
{
- insn_size += build_indexed_byte (&operands[0], format, 1);
+ build_indexed_byte (&operands[0], format, 1);
i = 1;
format &= ~M6812_OP_IDX;
}
if (format & M6812_OP_IDX_P2)
{
- insn_size += build_indexed_byte (&operands[1], format, 1);
+ build_indexed_byte (&operands[1], format, 1);
i = 0;
format &= ~M6812_OP_IDX_P2;
}
if (format & (M6811_OP_DIRECT | M6811_OP_IMM8))
{
- insn_size++;
fixup8 (&operands[i].exp,
format & (M6811_OP_DIRECT | M6811_OP_IMM8 | M6812_OP_TRAP_ID),
operands[i].mode);
}
else if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
{
- insn_size += 2;
fixup16 (&operands[i].exp, format & (M6811_OP_IMM16 | M6811_OP_IND16),
operands[i].mode);
i++;
if ((format & M6811_OP_IY) && (operands[0].reg1 != REG_Y))
as_bad (_("Invalid indexed register, expecting register Y."));
- insn_size++;
fixup8 (&operands[0].exp, M6811_OP_IX, operands[0].mode);
i = 1;
}
else if (format &
(M6812_OP_IDX | M6812_OP_IDX_2 | M6812_OP_IDX_1 | M6812_OP_D_IDX))
{
- insn_size += build_indexed_byte (&operands[i], format, move_insn);
+ build_indexed_byte (&operands[i], format, move_insn);
i++;
}
else if (format & M6812_OP_REG && current_architecture & cpu6812)
{
- insn_size += build_reg_mode (&operands[i], format);
+ build_reg_mode (&operands[i], format);
i++;
}
if (format & M6811_OP_BITMASK)
{
- insn_size++;
fixup8 (&operands[i].exp, M6811_OP_BITMASK, operands[i].mode);
i++;
}
if (format & M6811_OP_JUMP_REL)
{
- insn_size++;
fixup8 (&operands[i].exp, M6811_OP_JUMP_REL, operands[i].mode);
- i++;
}
else if (format & M6812_OP_IND16_P2)
{
- insn_size += 2;
fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode);
}
}
}
/* Identify a possible instruction alias. There are some on the
- 68HC12 to emulate a fiew 68HC11 instructions. */
+ 68HC12 to emulate a few 68HC11 instructions. */
if (opc == NULL && (current_architecture & cpu6812))
{
int i;
return 0;
}
-
-int
-m68hc11_cleanup ()
-{
- return 1;
-}
/* tc-m68hc11.h -- Header file for tc-m68hc11.c.
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
#define TC_M68HC11
#define TC_M68HC12
+#ifdef ANSI_PROTOTYPES
+struct fix;
+#endif
+
/* Define TC_M68K so that we can use the MRI mode. */
#define TC_M68K
#define LISTING_LHS_WIDTH 4 /* One word on the first line */
#define LISTING_LHS_WIDTH_SECOND 4 /* One word on the second line */
#define LISTING_LHS_CONT_LINES 4 /* And 4 lines max */
-#define LISTING_HEADER "M68HC11 GAS "
+#define LISTING_HEADER m68hc11_listing_header ()
+extern const char *m68hc11_listing_header PARAMS (());
/* call md_pcrel_from_section, not md_pcrel_from */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC)
+extern long md_pcrel_from_section PARAMS ((struct fix *fixp, segT sec));
/* Permit temporary numeric labels. */
#define LOCAL_LABELS_FB 1
#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */
-extern void m68hc11_init_after_args PARAMS ((void));
#define tc_init_after_args m68hc11_init_after_args
+extern void m68hc11_init_after_args PARAMS ((void));
-extern int m68hc11_parse_long_option PARAMS ((char *));
#define md_parse_long_option m68hc11_parse_long_option
+extern int m68hc11_parse_long_option PARAMS ((char *));
#define DWARF2_LINE_MIN_INSN_LENGTH 1
/* Relax table to translate short relative branches (-128..127) into
absolute branches. */
-extern struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
-
-extern int m68hc11_cleanup PARAMS ((void));
+extern struct relax_type md_relax_table[];
#define md_operand(x)
-#define md_after_pass_hook() m68hc11_cleanup()
-#define md_cleanup() m68hc11_cleanup()
-#define md_do_align(a,b,c,d,e) m68hc11_cleanup()
#define tc_frob_label(sym) do {\
- m68hc11_cleanup(); \
S_SET_VALUE (sym, (valueT) frag_now_fix ()); \
} while (0)
-#define tc_print_statistics m68hc11_print_statistics
+#define tc_print_statistics(FILE) m68hc11_print_statistics (FILE)
extern void m68hc11_print_statistics PARAMS ((FILE *));