gdb: ARM: Fix for bug in pop instruction decoding

This patch fixes thumb push instruction recording by replacing base
register from pc to sp.

gdb/ChangeLog:

2014-01-15  Omair Javaid  <omair.javaid@linaro.org>

	* arm-tdep.c (thumb_record_misc): Update to use sp as base
	register for push instruction recording.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index ccc83402239e400c8b3d2bbd1524bff503ea6958..1070587601941811693988a34dad00df0b259d9b 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2014-01-15  Omair Javaid  <omair.javaid@linaro.org>
+
+       * arm-tdep.c (thumb_record_misc): Update to use sp as base
+       register for push instruction recording.
+
 2014-01-15  Omair Javaid  <omair.javaid@linaro.org>
 
        * arm-tdep.c (thumb_record_misc): Update to correct logical

diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index c945cbd0717c091db4d5466e172f0cf193fd878a..009536a95617454d2f57b75df0e5a84a3fd5c778 100644 (file)
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -12204,7 +12204,7 @@ thumb_record_misc (insn_decode_record *thumb_insn_r)
     {
       /* PUSH.  */
       register_bits = bits (thumb_insn_r->arm_insn, 0, 7);
-      regcache_raw_read_unsigned (reg_cache, ARM_PC_REGNUM, &u_regval);
+      regcache_raw_read_unsigned (reg_cache, ARM_SP_REGNUM, &u_regval);
       while (register_bits)
         {
           if (register_bits & 0x00000001)