projects
/
yosys.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
169ffcd
)
respect hide_internal flag
author
Miodrag Milanovic
<mmicko@gmail.com>
Wed, 2 Feb 2022 09:15:22 +0000
(10:15 +0100)
committer
Miodrag Milanovic
<mmicko@gmail.com>
Wed, 2 Feb 2022 09:15:22 +0000
(10:15 +0100)
passes/sat/sim.cc
patch
|
blob
|
history
diff --git
a/passes/sat/sim.cc
b/passes/sat/sim.cc
index 3c8d03cbaab8c0e1abe8090e53780fcca58ec2a6..d33c20c51732fae7b7ccdebe37639ab067bef5f2 100644
(file)
--- a/
passes/sat/sim.cc
+++ b/
passes/sat/sim.cc
@@
-161,7
+161,7
@@
struct SimInstance
}
}
- if (
shared->fst
) {
+ if (
(shared->fst) && !(shared->hide_internal && wire->name[0] == '$')
) {
fstHandle id = shared->fst->getHandle(scope + "." + RTLIL::unescape_id(wire->name));
if (id==0 && wire->name.isPublic())
log_warning("Unable to found wire %s in input file.\n", (scope + "." + RTLIL::unescape_id(wire->name)).c_str());