projects / yosys.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | combined (merge: 6d4b6b1 33e6d05)
Merge pull request #1521 from dh73/diego/memattr
authorEddie Hung <eddie@fpgeh.com>
Tue, 17 Dec 2019 05:48:02 +0000 (21:48 -0800)
committerGitHub <noreply@github.com>
Tue, 17 Dec 2019 05:48:02 +0000 (21:48 -0800)
Adding support for Xilinx memory attribute 'block' in single port mode.


Trivial merge