AVX-512. 72/n. Extend VI itterator.
authorAlexander Ivchenko <alexander.ivchenko@intel.com>
Tue, 14 Oct 2014 08:49:23 +0000 (08:49 +0000)
committerKirill Yukhin <kyukhin@gcc.gnu.org>
Tue, 14 Oct 2014 08:49:23 +0000 (08:49 +0000)
gcc/
* config/i386/i386.c
(ix86_expand_vector_logical_operator): Handle V16SF and V8DF modes.
* config/i386/sse.md
(define_mode_iterator VI): Add V64QI and V32HI modes.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216190

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/config/i386/sse.md

index e8041c4ce7995f5ab487f71a80d4c8120b0321da..b589752af4bc36ee0770cdf49f11599695060fff 100644 (file)
@@ -1,3 +1,17 @@
+2014-10-14  Alexander Ivchenko  <alexander.ivchenko@intel.com>
+           Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
+           Anna Tikhonova  <anna.tikhonova@intel.com>
+           Ilya Tocar  <ilya.tocar@intel.com>
+           Andrey Turetskiy  <andrey.turetskiy@intel.com>
+           Ilya Verbin  <ilya.verbin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+           Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+       * config/i386/i386.c
+       (ix86_expand_vector_logical_operator): Handle V16SF and V8DF modes.
+       * config/i386/sse.md
+       (define_mode_iterator VI): Add V64QI and V32HI modes.
+
 2014-10-14  Alexander Ivchenko  <alexander.ivchenko@intel.com>
            Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
            Anna Tikhonova  <anna.tikhonova@intel.com>
index a485bb1872813102e9bc9444e92c748956317602..c4f2da1c04db8dabbc29d24d1c18ac0b545d768d 100644 (file)
@@ -17540,8 +17540,10 @@ ix86_expand_vector_logical_operator (enum rtx_code code, enum machine_mode mode,
        {
        case V4SFmode:
        case V8SFmode:
+       case V16SFmode:
        case V2DFmode:
        case V4DFmode:
+       case V8DFmode:
          dst = gen_reg_rtx (GET_MODE (SUBREG_REG (op1)));
          if (GET_CODE (op2) == CONST_VECTOR)
            {
index 55c3ab82a5ccfbbe4526285e9b5f6d323cc7c460..0125cd1b285cda8ddfe9b5e70a5d56e4f83939f5 100644 (file)
 ;; All vector integer modes
 (define_mode_iterator VI
   [(V16SI "TARGET_AVX512F") (V8DI "TARGET_AVX512F")
-   (V32QI "TARGET_AVX") V16QI
-   (V16HI "TARGET_AVX") V8HI
+   (V64QI "TARGET_AVX512BW") (V32QI "TARGET_AVX") V16QI
+   (V32HI "TARGET_AVX512BW") (V16HI "TARGET_AVX") V8HI
    (V8SI "TARGET_AVX") V4SI
    (V4DI "TARGET_AVX") V2DI])