xaiger: do not promote output wires

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 37ef30522c9dc499ccb88df218ecbbf18f1ed331..f17a4c775cf3509753a8e031d53b51dd0aba59a2 100644 (file)
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -155,11 +155,6 @@ struct XAigerWriter
                        if (wire->port_input)
                                sigmap.add(wire);
 
-               // promote output wires
-               for (auto wire : module->wires())
-                       if (wire->port_output)
-                               sigmap.add(wire);
-
                for (auto wire : module->wires())
                {
                        if (wire->attributes.count("\\init")) {