ARM: Handle register indexed system calls.
authorAli Saidi <saidi@eecs.umich.edu>
Mon, 27 Jul 2009 07:51:01 +0000 (00:51 -0700)
committerAli Saidi <saidi@eecs.umich.edu>
Mon, 27 Jul 2009 07:51:01 +0000 (00:51 -0700)
src/arch/arm/isa/decoder.isa
src/arch/arm/isa/operands.isa
src/arch/arm/linux/process.cc

index 76d584858b3601b85abcb66faeb9d8e88d27bdec..f43395c19bde91bd91fc23088c0c464eb0c43dc9 100644 (file)
@@ -422,7 +422,10 @@ format DataOp {
             // ARM System Call (SoftWare Interrupt)
             1: swi({{ if (testPredicate(Cpsr, condCode))
                       {
-                          xc->syscall(IMMED_23_0);
+                          if (IMMED_23_0)
+                              xc->syscall(IMMED_23_0);
+                          else
+                              xc->syscall(R7);
                       }
             }});
         }
index fa41918c153f19f21180a2ff1cfcba8b664a1260..6e6eea5a89583672e0052404973a80e6ca40493e 100644 (file)
@@ -57,6 +57,7 @@ def operands {{
     'Rm': ('IntReg', 'uw', 'RM', 'IsInteger', 2, maybePCRead, maybePCWrite),
     'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 3, maybePCRead, maybePCWrite),
     'Rn': ('IntReg', 'uw', 'RN', 'IsInteger', 4, maybePCRead, maybePCWrite),
+    'R7': ('IntReg', 'uw', '7', 'IsInteger', 5),
 
     #Destination register for load/store double instructions
     'Rdo': ('IntReg', 'uw', '(RD & ~1)', 'IsInteger', 4, maybePCRead, maybePCWrite),
index 7158acfffc1e0aa3b3abb3b3470029efe25ec65a..c5320c1abe5a345e803adad66f3ffa28c434d013 100644 (file)
@@ -448,7 +448,8 @@ ArmLinuxProcess::getDesc(int callnum)
     // Angel SWI syscalls are unsupported in this release
     if (callnum == 0x123456) {
         panic("Attempt to execute an ANGEL_SWI system call (newlib-related)");
-    } else if ((callnum & 0x00f00000) == 0x00900000) {
+    } else if ((callnum & 0x00f00000) == 0x00900000 || 
+            (callnum & 0xf0000) == 0xf0000) {
         callnum &= 0x000fffff;
         if ((callnum & 0x0f0000) == 0xf0000) {
             callnum -= 0x0f0001;