Fix gcc.target/aarch64/sve/sel_3.c for big-endian targets

A pasto in this test meant that we needed extra reverse instructions
for big-endian targets.

2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
	* gcc.target/aarch64/sve/sel_3.c (permute_vnx4sf): Take __SVFloat32_t
	rather than __SVFloat16_t

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index fc3d9618c8e4a7226d27170d164a6428adcd9cf6..d844a3cd2d20eefcf6742598c32c25f7c4222ac5 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * gcc.target/aarch64/sve/sel_3.c (permute_vnx4sf): Take __SVFloat32_t
+       rather than __SVFloat16_t
+
 2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>
 
        * g++.dg/ext/sve-sizeless-1.C: Don't expect an error for alias

diff --git a/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c b/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c
index 0de1fae6d038f8939cadb40f4828e2f58bc5265d..36ec15b7da6afa76d0ecfc8b52c53e06e7e2579b 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c
@@ -82,7 +82,7 @@ permute_vnx8hf (__SVFloat16_t x, __SVFloat16_t y)
 **     ret
 */
 __SVFloat32_t
-permute_vnx4sf (__SVFloat16_t x, __SVFloat16_t y)
+permute_vnx4sf (__SVFloat32_t x, __SVFloat32_t y)
 {
   return __builtin_shuffle ((vnx4sf) x, (vnx4sf) y, (vnx4si) MASK_8);
 }