arch, mem, cpu, systemc: Remove Python 2.7 glue code

Remove uses of six and from __future__ imports as they are no longer
needed.

Change-Id: Ib10d01d9398795f46eedeb91a02736f248917b6a
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39758
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>

diff --git a/src/arch/arm/fastmodel/SConscript b/src/arch/arm/fastmodel/SConscript
index f5516fa1ba24ac74da592d8ad6c2d11ee8dff0e9..21b3d3caaa9a58deeffa3899d5128e9ae2cbac06 100644 (file)
--- a/src/arch/arm/fastmodel/SConscript
+++ b/src/arch/arm/fastmodel/SConscript
@@ -35,7 +35,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
 from itertools import cycle
 
 Import('*')

diff --git a/src/arch/micro_asm.py b/src/arch/micro_asm.py
index 53026c16f473807633940b5e0492a9c04bd81cc0..0305a024f89d76ebc92f3ba465770725948a4cb1 100644 (file)
--- a/src/arch/micro_asm.py
+++ b/src/arch/micro_asm.py
@@ -24,8 +24,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 import os
 import sys
 import re

diff --git a/src/arch/micro_asm_test.py b/src/arch/micro_asm_test.py
index e34e06e2faffbba0805f338c6dbe0a28eaa84d45..8bab7b95238fccc6feb905ef9b8ed2a1b713252a 100755 (executable)
--- a/src/arch/micro_asm_test.py
+++ b/src/arch/micro_asm_test.py
@@ -24,8 +24,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 from micro_asm import MicroAssembler, Combinational_Macroop, Rom_Macroop, Rom
 
 class Bah(object):

diff --git a/src/arch/x86/isa/microops/fpop.isa b/src/arch/x86/isa/microops/fpop.isa
index 238fa931081c17d0cceacf0dd8244337a1a8a689..346f0d68647a458f21fc61b9cc5b90a687fac857 100644 (file)
--- a/src/arch/x86/isa/microops/fpop.isa
+++ b/src/arch/x86/isa/microops/fpop.isa
@@ -105,8 +105,6 @@ def template MicroFpOpConstructor {{
 
 let {{
 
-    import six
-
     # Make these empty strings so that concatenating onto
     # them will always work.
     header_output = ""
@@ -199,8 +197,7 @@ let {{
 
             return cls
 
-    @six.add_metaclass(FpOpMeta)
-    class FpUnaryOp(X86Microop):
+    class FpUnaryOp(X86Microop, metaclass=FpOpMeta):
         # This class itself doesn't act as a microop
         abstract = True
 
@@ -235,8 +232,7 @@ let {{
                 "dataSize" : self.dataSize,
                 "spm" : self.spm}
 
-    @six.add_metaclass(FpOpMeta)
-    class FpBinaryOp(X86Microop):
+    class FpBinaryOp(X86Microop, metaclass=FpOpMeta):
         # This class itself doesn't act as a microop
         abstract = True
 

diff --git a/src/arch/x86/isa/microops/limmop.isa b/src/arch/x86/isa/microops/limmop.isa
index b46be03453302704bec9a7944668ea3ccbd95637..51310b4ba8153bd9fde2eba1ea17eef8e9a582e0 100644 (file)
--- a/src/arch/x86/isa/microops/limmop.isa
+++ b/src/arch/x86/isa/microops/limmop.isa
@@ -106,16 +106,12 @@ def template MicroLimmOpConstructor {{
 }};
 
 let {{
-    import six
-    if six.PY3:
-        long = int
-
     class LimmOp(X86Microop):
         def __init__(self, dest, imm, dataSize="env.dataSize"):
             self.className = "Limm"
             self.mnemonic = "limm"
             self.dest = dest
-            if isinstance(imm, (int, long)):
+            if isinstance(imm, int):
                 imm = "ULL(%d)" % imm
             self.imm = imm
             self.dataSize = dataSize
@@ -145,7 +141,7 @@ let {{
             self.className = "Lfpimm"
             self.mnemonic = "lfpimm"
             self.dest = dest
-            if isinstance(imm, (int, long)):
+            if isinstance(imm, int):
                 imm = "ULL(%d)" % imm
             elif isinstance(imm, float):
                 imm = "floatToBits64(%.16f)" % imm

diff --git a/src/arch/x86/isa/microops/mediaop.isa b/src/arch/x86/isa/microops/mediaop.isa
index 7e5fd10118c50286de30a7b9e39a2c5f87b9f48e..e149d44699ce59db1c79abf06c7894bcb3a5fa1a 100644 (file)
--- a/src/arch/x86/isa/microops/mediaop.isa
+++ b/src/arch/x86/isa/microops/mediaop.isa
@@ -202,8 +202,7 @@ let {{
             return cls
 
 
-    @six.add_metaclass(MediaOpMeta)
-    class MediaOp(X86Microop):
+    class MediaOp(X86Microop, metaclass=MediaOpMeta):
         # This class itself doesn't act as a microop
         abstract = True
 

diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index da1f9aeb82cd6e65b7c57708968065ac78ec4f86..c465dccd7d12ab9679a28d4b86d16ede002e1b0f 100644 (file)
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -416,8 +416,7 @@ let {{
             return cls
 
 
-    @six.add_metaclass(RegOpMeta)
-    class RegOp(X86Microop):
+    class RegOp(X86Microop, metaclass=RegOpMeta):
         # This class itself doesn't act as a microop
         abstract = True
 

diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 025e985f8a694ec36f46244baa93021e1bda53a0..cb43419479d144d7fe902ec3b5ab4162275ac0ab 100644 (file)
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -38,8 +38,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 import sys
 
 from m5.SimObject import *

diff --git a/src/cpu/minor/MinorCPU.py b/src/cpu/minor/MinorCPU.py
index 1329dfbb8ff8a3a6f9bd8bf750b3a5241a3d6011..e9003bdf3f94ee5ca4384cfc5982e4d6430f93b7 100644 (file)
--- a/src/cpu/minor/MinorCPU.py
+++ b/src/cpu/minor/MinorCPU.py
@@ -36,8 +36,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *

diff --git a/src/cpu/o3/O3CPU.py b/src/cpu/o3/O3CPU.py
index 11187755479a40f8c8a7ec2088e1bc25ab711be3..6f48c2b1c6bcf15cfde130467171ed656308837f 100644 (file)
--- a/src/cpu/o3/O3CPU.py
+++ b/src/cpu/o3/O3CPU.py
@@ -36,8 +36,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 from m5.defines import buildEnv
 from m5.params import *
 from m5.proxy import *

diff --git a/src/cpu/simple/BaseSimpleCPU.py b/src/cpu/simple/BaseSimpleCPU.py
index f60d005baeb21e4276164c260ca620f251ddda23..3da462c219a642f6b9c7e22e98299545f8d3ebd3 100644 (file)
--- a/src/cpu/simple/BaseSimpleCPU.py
+++ b/src/cpu/simple/BaseSimpleCPU.py
@@ -24,8 +24,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 from m5.defines import buildEnv
 from m5.params import *
 

diff --git a/src/mem/qos/QoSPolicy.py b/src/mem/qos/QoSPolicy.py
index 0945cd7a46bd64ff2f613ae7799a8d6ab4becd45..6e9e90ecc4672ee1377404ed5c778869c0b42d08 100644 (file)
--- a/src/mem/qos/QoSPolicy.py
+++ b/src/mem/qos/QoSPolicy.py
@@ -33,8 +33,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from six import string_types
-
 from m5.SimObject import *
 from m5.params import *
 
@@ -78,7 +76,7 @@ class QoSFixedPriorityPolicy(QoSPolicy):
             for prio in self._requestor_priorities:
                 request_port = prio[0]
                 priority = prio[1]
-                if isinstance(request_port, string_types):
+                if isinstance(request_port, str):
                     self.getCCObject().initRequestorName(
                         request_port, int(priority))
                 else:
@@ -115,7 +113,7 @@ class QoSPropFairPolicy(QoSPolicy):
             for prio in self._requestor_scores:
                 request_port = prio[0]
                 score = prio[1]
-                if isinstance(request_port, string_types):
+                if isinstance(request_port, str):
                     self.getCCObject().initRequestorName(
                         request_port, float(score))
                 else:

diff --git a/src/mem/slicc/main.py b/src/mem/slicc/main.py
index f7f04946d191c196caf76c53de413480853135f7..c3afd2e1433902ec2147546725e11895df119539 100644 (file)
--- a/src/mem/slicc/main.py
+++ b/src/mem/slicc/main.py
@@ -25,8 +25,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 import os
 import sys
 

diff --git a/src/mem/slicc/util.py b/src/mem/slicc/util.py
index 7afa4f88e906b16814a61de1f7fcab26895f0ff2..ace879e331c8bd377d3df5e377c450df8173647f 100644 (file)
--- a/src/mem/slicc/util.py
+++ b/src/mem/slicc/util.py
@@ -24,9 +24,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-from six import string_types
-
 import os
 import sys
 
@@ -50,7 +47,7 @@ class PairContainer(object):
 
 class Location(object):
     def __init__(self, filename, lineno, no_warning=False):
-        if not isinstance(filename, string_types):
+        if not isinstance(filename, str):
             raise AttributeError(
                 "filename must be a string, found {}".format(type(filename)))
         if not isinstance(lineno, int):

diff --git a/src/systemc/tests/config.py b/src/systemc/tests/config.py
index f7af1a55869fb639269e3c621c84fe6f9dc50bec..b199080018fd918d887970f2bea9caddf3eb35c9 100755 (executable)
--- a/src/systemc/tests/config.py
+++ b/src/systemc/tests/config.py
@@ -23,8 +23,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 import argparse
 import m5
 import os

diff --git a/src/systemc/tests/verify.py b/src/systemc/tests/verify.py
index 2c0ebc91691e240502bc9acd861e9b73acd24f42..6b4cf5ce70f13bfeee142348938851f7ffb921be 100755 (executable)
--- a/src/systemc/tests/verify.py
+++ b/src/systemc/tests/verify.py
@@ -25,8 +25,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 import argparse
 import collections
 import difflib
@@ -38,7 +36,6 @@ import multiprocessing.pool
 import os
 import re
 import subprocess
-import six
 import sys
 
 script_path = os.path.abspath(inspect.getfile(inspect.currentframe()))
@@ -110,8 +107,7 @@ class TestPhaseMeta(type):
 
         super(TestPhaseMeta, cls).__init__(name, bases, d)
 
-@six.add_metaclass(TestPhaseMeta)
-class TestPhaseBase(object):
+class TestPhaseBase(object, metaclass=TestPhaseMeta):
     abstract = True
 
     def __init__(self, main_args, *args):

diff --git a/src/unittest/genini.py b/src/unittest/genini.py
index 2575fc05f8bcee20f19862da28bb74e591934f76..854ce023734629a125bbfec7ea53929d98144978 100755 (executable)
--- a/src/unittest/genini.py
+++ b/src/unittest/genini.py
@@ -25,8 +25,6 @@
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-from __future__ import print_function
-
 import getopt, os, os.path, sys
 from os.path import join as joinpath, realpath