clean up vector exception instructions

diff --git a/riscv/dispatch.h b/riscv/dispatch.h
index 0110577d2df7c25d680de20b71a7969e083ea772..a951be6ffce465ad3fae40a342e62e7b1a73068b 100644 (file)
--- a/riscv/dispatch.h
+++ b/riscv/dispatch.h
@@ -231,6 +231,7 @@ reg_t insn_func_867(insn_t insn, reg_t reg);
 reg_t insn_func_882(insn_t insn, reg_t reg);
 reg_t insn_func_889(insn_t insn, reg_t reg);
 reg_t insn_func_890(insn_t insn, reg_t reg);
+reg_t insn_func_891(insn_t insn, reg_t reg);
 reg_t insn_func_898(insn_t insn, reg_t reg);
 reg_t insn_func_914(insn_t insn, reg_t reg);
 reg_t insn_func_915(insn_t insn, reg_t reg);

diff --git a/riscv/insns/vxcptrestore.h b/riscv/insns/vxcptrestore.h
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/riscv/insns/vxcptsave.h b/riscv/insns/vxcptsave.h
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/riscv/opcodes.h b/riscv/opcodes.h
index 1e4881f25fc3db4d39a748845dca448b5711ef79..670e0bfa05e27abb82b0d61c9eade7af45799b38 100644 (file)
--- a/riscv/opcodes.h
+++ b/riscv/opcodes.h
@@ -17,6 +17,7 @@ DECLARE_INSN(c_lw0, 0x12, 0x801f)
 DECLARE_INSN(slliw, 0x9b, 0x3f83ff)
 DECLARE_INSN(lb, 0x3, 0x3ff)
 DECLARE_INSN(vlwu, 0x30b, 0x3fffff)
+DECLARE_INSN(fcvt_s_wu, 0xf053, 0x3ff1ff)
 DECLARE_INSN(fcvt_d_l, 0xc0d3, 0x3ff1ff)
 DECLARE_INSN(lh, 0x83, 0x3ff)
 DECLARE_INSN(fcvt_d_w, 0xe0d3, 0x3ff1ff)
@@ -37,7 +38,7 @@ DECLARE_INSN(c_li, 0x0, 0x1f)
 DECLARE_INSN(di, 0xfb, 0x7ffffff)
 DECLARE_INSN(sltiu, 0x193, 0x3ff)
 DECLARE_INSN(mtpcr, 0x1fb, 0xf801ffff)
-DECLARE_INSN(vxcptwait, 0x1817b, 0xffffffff)
+DECLARE_INSN(vxcptwait, 0x180fb, 0xffffffff)
 DECLARE_INSN(stop, 0x177, 0xffffffff)
 DECLARE_INSN(vld, 0x18b, 0x3fffff)
 DECLARE_INSN(c_slli, 0x19, 0x1c1f)
@@ -127,12 +128,12 @@ DECLARE_INSN(c_add3, 0x1c, 0x31f)
 DECLARE_INSN(sraiw, 0x1029b, 0x3f83ff)
 DECLARE_INSN(vssegd, 0x218f, 0x1ffff)
 DECLARE_INSN(srl, 0x2b3, 0x1ffff)
-DECLARE_INSN(venqcmd, 0x1007b, 0xf801ffff)
+DECLARE_INSN(venqcmd, 0x181fb, 0xf801ffff)
 DECLARE_INSN(vfmts, 0x1973, 0x1ffff)
-DECLARE_INSN(venqimm1, 0x100fb, 0xf801ffff)
+DECLARE_INSN(venqimm1, 0x1827b, 0xf801ffff)
 DECLARE_INSN(fsgnjx_s, 0x7053, 0x1ffff)
 DECLARE_INSN(vfmsv, 0x973, 0x3fffff)
-DECLARE_INSN(venqimm2, 0x1017b, 0xf801ffff)
+DECLARE_INSN(venqimm2, 0x182fb, 0xf801ffff)
 DECLARE_INSN(fcvt_d_wu, 0xf0d3, 0x3ff1ff)
 DECLARE_INSN(vmts, 0x1873, 0x1ffff)
 DECLARE_INSN(or, 0x333, 0x1ffff)
@@ -156,7 +157,7 @@ DECLARE_INSN(vlstd, 0x118b, 0x1ffff)
 DECLARE_INSN(c_ld0, 0x8012, 0x801f)
 DECLARE_INSN(rdtime, 0x677, 0x7ffffff)
 DECLARE_INSN(andi, 0x393, 0x3ff)
-DECLARE_INSN(venqcnt, 0x101fb, 0xf801ffff)
+DECLARE_INSN(venqcnt, 0x1837b, 0xf801ffff)
 DECLARE_INSN(fsgnjn_d, 0x60d3, 0x1ffff)
 DECLARE_INSN(fnmadd_s, 0x4f, 0x1ff)
 DECLARE_INSN(jal, 0x6f, 0x7f)
@@ -217,6 +218,7 @@ DECLARE_INSN(vlstwu, 0x130b, 0x1ffff)
 DECLARE_INSN(c_sub3, 0x11c, 0x31f)
 DECLARE_INSN(vsh, 0x8f, 0x3fffff)
 DECLARE_INSN(vlb, 0xb, 0x3fffff)
+DECLARE_INSN(vxcptsave, 0x1007b, 0xffffffff)
 DECLARE_INSN(vlsegstd, 0x98b, 0xfff)
 DECLARE_INSN(vflsegd, 0x258b, 0x1ffff)
 DECLARE_INSN(vflsegw, 0x250b, 0x1ffff)
@@ -229,9 +231,9 @@ DECLARE_INSN(fcvt_l_d, 0x80d3, 0x3ff1ff)
 DECLARE_INSN(vmsv, 0x873, 0x3fffff)
 DECLARE_INSN(vmst, 0x1073, 0x1ffff)
 DECLARE_INSN(fadd_d, 0xd3, 0x1f1ff)
-DECLARE_INSN(fcvt_s_wu, 0xf053, 0x3ff1ff)
+DECLARE_INSN(vxcptrestore, 0x100fb, 0xffffffff)
 DECLARE_INSN(rdnpc, 0x26b, 0x7ffffff)
-DECLARE_INSN(vxcpthold, 0x181fb, 0xffffffff)
+DECLARE_INSN(vxcpthold, 0x1817b, 0xffffffff)
 DECLARE_INSN(fcvt_s_l, 0xc053, 0x3ff1ff)
 DECLARE_INSN(vflsegstd, 0xd8b, 0xfff)
 DECLARE_INSN(c_add, 0x1a, 0x801f)
@@ -242,7 +244,7 @@ DECLARE_INSN(fmadd_s, 0x43, 0x1ff)
 DECLARE_INSN(fcvt_w_s, 0xa053, 0x3ff1ff)
 DECLARE_INSN(vssegh, 0x208f, 0x1ffff)
 DECLARE_INSN(fsqrt_s, 0x4053, 0x3ff1ff)
-DECLARE_INSN(vxcptkill, 0x180fb, 0xffffffff)
+DECLARE_INSN(vxcptkill, 0x1017b, 0xffffffff)
 DECLARE_INSN(c_srai, 0x1019, 0x1c1f)
 DECLARE_INSN(amomin_w, 0x112b, 0x1ffff)
 DECLARE_INSN(fsgnjn_s, 0x6053, 0x1ffff)