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Fixed ice40 handling of negclk RAM40
authorClifford Wolf <clifford@clifford.at>
Thu, 10 Sep 2015 15:35:19 +0000 (17:35 +0200)
committerClifford Wolf <clifford@clifford.at>
Thu, 10 Sep 2015 15:35:19 +0000 (17:35 +0200)
techlibs/ice40/brams_map.v patch | blob | history
techlibs/ice40/cells_sim.v patch | blob | history

diff --git a/techlibs/ice40/brams_map.v b/techlibs/ice40/brams_map.v
index 8c5c7e812d8553385d19c74d9cc366a7fb5f1bbd..f3674b4ede9096b2ebca3bcc125bf55f38c8be25 100644 (file)
--- a/techlibs/ice40/brams_map.v
+++ b/techlibs/ice40/brams_map.v
@@ -90,7 +90,7 @@ module \$__ICE40_RAM4K (
                                        .RCLKE(RCLKE),
                                        .RE   (RE   ),
                                        .RADDR(RADDR),
-                                       .WCLK (WCLK ),
+                                       .WCLKN(WCLK ),
                                        .WCLKE(WCLKE),
                                        .WE   (WE   ),
                                        .WADDR(WADDR),
@@ -119,7 +119,7 @@ module \$__ICE40_RAM4K (
                                        .INIT_F(INIT_F)
                                ) _TECHMAP_REPLACE_ (
                                        .RDATA(RDATA),
-                                       .RCLK (RCLK ),
+                                       .RCLKN(RCLK ),
                                        .RCLKE(RCLKE),
                                        .RE   (RE   ),
                                        .RADDR(RADDR),
@@ -152,11 +152,11 @@ module \$__ICE40_RAM4K (
                                        .INIT_F(INIT_F)
                                ) _TECHMAP_REPLACE_ (
                                        .RDATA(RDATA),
-                                       .RCLK (RCLK ),
+                                       .RCLKN(RCLK ),
                                        .RCLKE(RCLKE),
                                        .RE   (RE   ),
                                        .RADDR(RADDR),
-                                       .WCLK (WCLK ),
+                                       .WCLKN(WCLK ),
                                        .WCLKE(WCLKE),
                                        .WE   (WE   ),
                                        .WADDR(WADDR),
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v
index 17b6be9ce7d802b68bc89351d9aa32860c13fad1..998ad3a1d2feb5bceca8518ef1831379efd09289 100644 (file)
--- a/techlibs/ice40/cells_sim.v
+++ b/techlibs/ice40/cells_sim.v
@@ -473,7 +473,7 @@ endmodule
 
 module SB_RAM40_4KNR (
        output [15:0] RDATA,
-       input         RCLK, RCLKE, RE,
+       input         RCLKN, RCLKE, RE,
        input  [10:0] RADDR,
        input         WCLK, WCLKE, WE,
        input  [10:0] WADDR,
@@ -520,7 +520,7 @@ module SB_RAM40_4KNR (
                .INIT_F    (INIT_F    )
        ) RAM (
                .RDATA(RDATA),
-               .RCLK (~RCLK),
+               .RCLK (~RCLKN),
                .RCLKE(RCLKE),
                .RE   (RE   ),
                .RADDR(RADDR),
@@ -537,7 +537,7 @@ module SB_RAM40_4KNW (
        output [15:0] RDATA,
        input         RCLK, RCLKE, RE,
        input  [10:0] RADDR,
-       input         WCLK, WCLKE, WE,
+       input         WCLKN, WCLKE, WE,
        input  [10:0] WADDR,
        input  [15:0] MASK, WDATA
 );
@@ -586,7 +586,7 @@ module SB_RAM40_4KNW (
                .RCLKE(RCLKE),
                .RE   (RE   ),
                .RADDR(RADDR),
-               .WCLK (~WCLK),
+               .WCLK (~WCLKN),
                .WCLKE(WCLKE),
                .WE   (WE   ),
                .WADDR(WADDR),
@@ -597,9 +597,9 @@ endmodule
 
 module SB_RAM40_4KNRNW (
        output [15:0] RDATA,
-       input         RCLK, RCLKE, RE,
+       input         RCLKN, RCLKE, RE,
        input  [10:0] RADDR,
-       input         WCLK, WCLKE, WE,
+       input         WCLKN, WCLKE, WE,
        input  [10:0] WADDR,
        input  [15:0] MASK, WDATA
 );
@@ -644,11 +644,11 @@ module SB_RAM40_4KNRNW (
                .INIT_F    (INIT_F    )
        ) RAM (
                .RDATA(RDATA),
-               .RCLK (~RCLK),
+               .RCLK (~RCLKN),
                .RCLKE(RCLKE),
                .RE   (RE   ),
                .RADDR(RADDR),
-               .WCLK (~WCLK),
+               .WCLK (~WCLKN),
                .WCLKE(WCLKE),
                .WE   (WE   ),
                .WADDR(WADDR),