Merge pull request #905 from christian-krieg/feature/python_bindings

Feature/python bindings

diff --cc Makefile
Simple merge

diff --cc README.md
Simple merge

diff --cc kernel/rtlil.cc
index f6f08bb9e98a5e4fe691499bd16415a2b8118d45,bb870f66f9a38880b09a08b53f7ef89e64ed2c73..7e1159cacd7cab59caf26b706d61aaba1638c85c
--- 1/kernel/rtlil.cc
--- 2/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@@ -642,32 -665,19 +668,43 @@@ RTLIL::Module::~Module(
                delete it->second;
        for (auto it = processes.begin(); it != processes.end(); ++it)
                delete it->second;
+ #ifdef WITH_PYTHON
+       RTLIL::Module::get_all_modules()->erase(hashidx_);
+ #endif
+ }
+ 
+ #ifdef WITH_PYTHON
+ static std::map<unsigned int, RTLIL::Module*> all_modules;
+ std::map<unsigned int, RTLIL::Module*> *RTLIL::Module::get_all_modules(void)
+ {
+       return &all_modules;
  }
+ #endif
  
 +void RTLIL::Module::makeblackbox()
 +{
 +      pool<RTLIL::Wire*> delwires;
 +
 +      for (auto it = wires_.begin(); it != wires_.end(); ++it)
 +              if (!it->second->port_input && !it->second->port_output)
 +                      delwires.insert(it->second);
 +
 +      for (auto it = memories.begin(); it != memories.end(); ++it)
 +              delete it->second;
 +      memories.clear();
 +
 +      for (auto it = cells_.begin(); it != cells_.end(); ++it)
 +              delete it->second;
 +      cells_.clear();
 +
 +      for (auto it = processes.begin(); it != processes.end(); ++it)
 +              delete it->second;
 +      processes.clear();
 +
 +      remove(delwires);
 +      set_bool_attribute("\\blackbox");
 +}
 +
  void RTLIL::Module::reprocess_module(RTLIL::Design *, dict<RTLIL::IdString, RTLIL::Module *>)
  {
        log_error("Cannot reprocess_module module `%s' !\n", id2cstr(name));

diff --cc kernel/rtlil.h
Simple merge