(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 177e30d91fee98730dd9e5a5f24644645f71bfe3..e18df6efb19910c6681443729195277ca6fb5c2d 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -15,7 +15,10 @@ including simulators and compilers: OpenRISC 1200 took 12 years to
 mature.  A Vector or Packed SIMD ISA to reach stable *general-purpose*
 auto-vectorisation compiler support has never been achieved in the
 history of computing, not with the combined resources of ARM, Intel,
-AMD, MIPS, Sun Microsystems, SGI, Cray, and many more.  Rather: GPUs
+AMD, MIPS, Sun Microsystems, SGI, Cray, and many more. (*Hand-crafted
+assembler and direct use of intrinsics is the Industry-standard norm
+to achieve high-performance optimisation where it matters*).
+Rather: GPUs
 have ultra-specialist compilers (CUDA) that are designed from the ground up
 to support Vector/SIMD parallelism, and associated standards
 (SPIR-V, Vulkan, OpenCL) managed by