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i965/fs: Use the builder dispatch_width for computing register offsets
authorJason Ekstrand <jason.ekstrand@intel.com>
Thu, 25 Jun 2015 18:00:01 +0000 (11:00 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Tue, 30 Jun 2015 23:13:51 +0000 (16:13 -0700)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
src/mesa/drivers/dri/i965/brw_fs.h patch | blob | history

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index ece7e49ea1759a746476700e63a7f55119e17a41..88a50ae0913f90f7a88025007d9165f79f87a3cd 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -72,7 +72,7 @@ offset(fs_reg reg, const brw::fs_builder& bld, unsigned delta)
    case MRF:
    case ATTR:
       return byte_offset(reg,
-                         delta * MAX2(reg.width * reg.stride, 1) *
+                         delta * MAX2(bld.dispatch_width() * reg.stride, 1) *
                          type_sz(reg.type));
    case UNIFORM:
       reg.reg_offset += delta;