if (mips_opts.isa < 2 && mips_trap)
as_bad ("trap exception not supported at ISA 1");
- switch (mips_opts.isa)
+ if (mips_cpu != 0 && mips_cpu != -1)
{
- case 1:
- ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 3000);
- break;
- case 2:
- ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 6000);
- break;
- case 3:
- ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 4000);
- break;
- case 4:
- ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 8000);
- break;
+ ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_cpu);
+ }
+ else
+ {
+ switch (mips_opts.isa)
+ {
+ case 1:
+ ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 3000);
+ break;
+ case 2:
+ ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 6000);
+ break;
+ case 3:
+ ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 4000);
+ break;
+ case 4:
+ ok = bfd_set_arch_mach (stdoutput, bfd_arch_mips, 8000);
+ break;
+ }
}
+
if (! ok)
as_warn ("Could not set architecture and machine");
{
frag_grow (20);
macro_build ((char *) NULL, counter, ep,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", reg, GP, (int) BFD_RELOC_MIPS_GPREL);
p = frag_var (rs_machine_dependent, 8, 0,
RELAX_ENCODE (4, 8, 0, 4, 0,
if (p != NULL)
p += 4;
macro_build (p, counter, ep,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
}
else if (mips_pic == SVR4_PIC && ! mips_big_got)
ep->X_add_number = 0;
frag_grow (20);
macro_build ((char *) NULL, counter, ep,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT16, GP);
macro_build ((char *) NULL, counter, (expressionS *) NULL, "nop", "");
p = frag_var (rs_machine_dependent, 4, 0,
RELAX_ENCODE (0, 4, -8, 0, 0, mips_opts.warn_about_macros),
ep->X_add_symbol, (offsetT) 0, (char *) NULL);
macro_build (p, counter, ep,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
if (ex.X_add_number != 0)
{
as_bad ("PIC code offset overflow (max 16 signed bits)");
ex.X_op = O_constant;
macro_build ((char *) NULL, counter, &ex,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
}
}
macro_build ((char *) NULL, counter, ep, "lui", "t,u", reg,
(int) BFD_RELOC_MIPS_GOT_HI16);
macro_build ((char *) NULL, counter, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", reg, reg, GP);
macro_build ((char *) NULL, counter, ep,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT_LO16, reg);
p = frag_var (rs_machine_dependent, 12 + off, 0,
RELAX_ENCODE (12, 12 + off, off, 8 + off, 0,
p += 4;
}
macro_build (p, counter, ep,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
macro_build (p, counter, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, counter, ep,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
if (ex.X_add_number != 0)
{
as_bad ("PIC code offset overflow (max 16 signed bits)");
ex.X_op = O_constant;
macro_build ((char *) NULL, counter, &ex,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
}
}
addiu $reg,$gp,<sym> (BFD_RELOC_MIPS_GPREL)
*/
macro_build ((char *) NULL, counter, ep,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", reg, GP, (int) BFD_RELOC_MIPS_GPREL);
}
else
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
treg, (int) BFD_RELOC_PCREL_HI16_S);
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", treg, treg, (int) BFD_RELOC_PCREL_LO16);
return;
}
{
frag_grow (20);
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, GP, (int) BFD_RELOC_MIPS_GPREL);
p = frag_var (rs_machine_dependent, 8, 0,
RELAX_ENCODE (4, 8, 0, 4, 0,
if (p != NULL)
p += 4;
macro_build (p, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
}
else if (mips_pic == SVR4_PIC && ! mips_big_got)
p += 4;
}
macro_build (p, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
/* FIXME: If breg == 0, and the next instruction uses
$tempreg, then if this variant case is used an extra
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
(void) frag_var (rs_machine_dependent, 0, 0,
RELAX_ENCODE (0, 0, -12, -4, 0, 0),
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", treg, AT, breg);
breg = 0;
tempreg = treg;
mips_optimize = hold_mips_optimize;
macro_build ((char *) NULL, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", AT, AT, (int) BFD_RELOC_LO16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, tempreg, AT);
(void) frag_var (rs_machine_dependent, 0, 0,
RELAX_ENCODE (0, 0, -16 + off1, -8, 0, 0),
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
tempreg, (int) BFD_RELOC_MIPS_GOT_HI16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, tempreg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
dbl ? "ld" : "lw",
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
p = frag_var (rs_machine_dependent, 12 + gpdel, 0,
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", treg, AT, breg);
dreg = treg;
adj = 8;
mips_optimize = hold_mips_optimize;
macro_build ((char *) NULL, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", AT, AT, (int) BFD_RELOC_LO16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", dreg, dreg, AT);
p = frag_var (rs_machine_dependent, 16 + gpdel + adj, 0,
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
/* FIXME: If add_number is 0, and there was no base
register, the external symbol case ended with a load,
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", treg, AT, breg);
p += 4;
tempreg = treg;
macro_build_lui (p, &icnt, &expr1, AT);
p += 4;
macro_build (p, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", AT, AT, (int) BFD_RELOC_LO16);
p += 4;
macro_build (p, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, tempreg, AT);
p += 4;
}
addiu $tempreg,$gp,<sym> (BFD_RELOC_MIPS_GPREL)
*/
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, GP, (int) BFD_RELOC_MIPS_GPREL);
}
else
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", treg, tempreg, breg);
if (! used_at)
{
expr1.X_add_number = mips_cprestore_offset;
macro_build ((char *) NULL, &icnt, &expr1,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", GP, (int) BFD_RELOC_LO16, mips_frame_reg);
}
}
if (! mips_big_got)
{
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", PIC_CALL_REG,
(int) BFD_RELOC_MIPS_CALL16, GP);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
PIC_CALL_REG, (int) BFD_RELOC_MIPS_CALL_HI16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", PIC_CALL_REG, PIC_CALL_REG, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", PIC_CALL_REG,
(int) BFD_RELOC_MIPS_CALL_LO16, PIC_CALL_REG);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", PIC_CALL_REG,
(int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", PIC_CALL_REG, PIC_CALL_REG,
(int) BFD_RELOC_LO16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
expr1.X_add_number = mips_cprestore_offset;
macro_build ((char *) NULL, &icnt, &expr1,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", GP, (int) BFD_RELOC_LO16,
mips_frame_reg);
}
{
frag_grow (28);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, breg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt,
treg, (int) BFD_RELOC_MIPS_GPREL, tempreg);
if (p != NULL)
p += 4;
macro_build (p, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, tempreg, breg);
if (p != NULL)
p += 4;
as_bad ("PIC code offset overflow (max 16 signed bits)");
frag_grow (20);
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT16, GP);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", "");
p = frag_var (rs_machine_dependent, 4, 0,
offset_expr.X_add_symbol, (offsetT) 0,
(char *) NULL);
macro_build (p, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, tempreg, breg);
macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg,
(int) BFD_RELOC_LO16, tempreg);
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
tempreg, (int) BFD_RELOC_MIPS_GOT_HI16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, tempreg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT_LO16,
tempreg);
p = frag_var (rs_machine_dependent, 12 + gpdel, 0,
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, tempreg, breg);
macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg,
(int) BFD_RELOC_LO16, tempreg);
else
{
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", tempreg, breg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt,
treg, (int) BFD_RELOC_MIPS_GPREL, tempreg);
else if (mips_pic == SVR4_PIC)
{
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
}
else if (mips_pic == EMBEDDED_PIC)
/* For embedded PIC we pick up the entire address off $gp in
a single instruction. */
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", AT, GP, (int) BFD_RELOC_MIPS_GPREL);
offset_expr.X_op = O_constant;
offset_expr.X_add_number = 0;
assert (strcmp (s, RDATA_SECTION_NAME) == 0);
if (mips_pic == SVR4_PIC)
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
else
{
{
frag_grow (36);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, breg, GP);
tempreg = AT;
off = 4;
if (breg != 0)
{
macro_build (p, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, breg, AT);
if (p != NULL)
p += 4;
off = 4;
frag_grow (24 + off);
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", "");
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, breg, AT);
/* Itbl support may require additional care here. */
macro_build ((char *) NULL, &icnt, &expr1, s, fmt,
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
AT, (int) BFD_RELOC_MIPS_GOT_HI16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, AT, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT_LO16, AT);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", "");
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, breg, AT);
/* Itbl support may require additional care here. */
macro_build ((char *) NULL, &icnt, &expr1, s, fmt,
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- mips_opts.isa < 3 ? "lw" : "ld",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "lw" : "ld"),
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
if (breg != 0)
{
macro_build (p, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, breg, AT);
p += 4;
}
else
{
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, breg, GP);
tempreg = AT;
used_at = 1;
case M_SD_OB:
s = "sw";
sd_ob:
- assert (mips_opts.isa < 3);
+ assert (bfd_arch_bits_per_address (stdoutput) == 32 || mips_opts.isa < 3);
macro_build ((char *) NULL, &icnt, &offset_expr, s, "t,o(b)", treg,
(int) BFD_RELOC_LO16, breg);
offset_expr.X_add_number += 4;
{
imm_expr.X_add_number = -imm_expr.X_add_number;
macro_build ((char *) NULL, &icnt, &imm_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", dreg, sreg,
(int) BFD_RELOC_LO16);
used_at = 0;
as_warn ("Instruction %s: result is always true",
ip->insn_mo->name);
macro_build ((char *) NULL, &icnt, &expr1,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", dreg, 0, (int) BFD_RELOC_LO16);
return;
}
{
imm_expr.X_add_number = -imm_expr.X_add_number;
macro_build ((char *) NULL, &icnt, &imm_expr,
- mips_opts.isa < 3 ? "addiu" : "daddiu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addiu" : "daddiu"),
"t,r,j", dreg, sreg, (int) BFD_RELOC_LO16);
used_at = 0;
}
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, AT, breg);
if (! target_big_endian)
expr1.X_add_number = off;
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, AT, breg);
if (target_big_endian)
expr1.X_add_number = 0;
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, AT, breg);
if (! target_big_endian)
expr1.X_add_number = off;
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", AT, AT, breg);
if (! target_big_endian)
expr1.X_add_number = 0;
ex.X_add_number = mips_cprestore_offset;
macro_build ((char *) NULL, &icnt, &ex,
- mips_opts.isa < 3 ? "sw" : "sd",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "sw" : "sd"),
"t,o(b)", GP, (int) BFD_RELOC_LO16, SP);
demand_empty_rest_of_line ();
/* Add $gp to the register named as an argument. */
reg = tc_get_register (0);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- mips_opts.isa < 3 ? "addu" : "daddu",
+ ((bfd_arch_bits_per_address (stdoutput) == 32
+ || mips_opts.isa < 3)
+ ? "addu" : "daddu"),
"d,v,t", reg, reg, GP);
demand_empty_rest_of_line ();