radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index a3198450923d0f64d45218973ce09654e9635f36..9a8dda7669dfeabb3367bfee49dfb1faf66f1d43 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -1351,13 +1351,12 @@ bool r600_extra_shader_checks(struct r600_common_screen *rscreen, unsigned proce
 }
 
 void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst,
-                             uint64_t offset, uint64_t size, unsigned value,
-                             enum r600_coherency coher)
+                             uint64_t offset, uint64_t size, unsigned value)
 {
        struct r600_common_context *rctx = (struct r600_common_context*)rscreen->aux_context;
 
        pipe_mutex_lock(rscreen->aux_context_lock);
-       rctx->clear_buffer(&rctx->b, dst, offset, size, value, coher);
+       rctx->dma_clear_buffer(&rctx->b, dst, offset, size, value);
        rscreen->aux_context->flush(rscreen->aux_context, NULL, 0);
        pipe_mutex_unlock(rscreen->aux_context_lock);
 }

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index da4b63c0b69a812274b3d746174024e7d141a32e..2bb622ab365e933aaa91f3f666da159b6a8e9981 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -723,8 +723,7 @@ bool r600_can_dump_shader(struct r600_common_screen *rscreen,
 bool r600_extra_shader_checks(struct r600_common_screen *rscreen,
                              unsigned processor);
 void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst,
-                             uint64_t offset, uint64_t size, unsigned value,
-                             enum r600_coherency coher);
+                             uint64_t offset, uint64_t size, unsigned value);
 struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen,
                                                  const struct pipe_resource *templ);
 const char *r600_get_llvm_processor_name(enum radeon_family family);

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 259ff36800c4cede0d81bd298af8807a9d01bdfd..cba4e7d734043f9357c7e80744edef158f7d5b28 100644 (file)
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -890,7 +890,7 @@ static void r600_texture_allocate_htile(struct r600_common_screen *rscreen,
        } else {
                r600_screen_clear_buffer(rscreen, &rtex->htile_buffer->b.b,
                                         0, rtex->surface.htile_size,
-                                        clear_value, R600_COHERENCY_NONE);
+                                        clear_value);
        }
 }
 
@@ -1105,7 +1105,7 @@ r600_texture_create_object(struct pipe_screen *screen,
                /* Initialize the cmask to 0xCC (= compressed state). */
                r600_screen_clear_buffer(rscreen, &rtex->cmask_buffer->b.b,
                                         rtex->cmask.offset, rtex->cmask.size,
-                                        0xCCCCCCCC, R600_COHERENCY_NONE);
+                                        0xCCCCCCCC);
        }
 
        /* Initialize DCC only if the texture is not being imported. */
@@ -1113,7 +1113,7 @@ r600_texture_create_object(struct pipe_screen *screen,
                r600_screen_clear_buffer(rscreen, &rtex->resource.b.b,
                                         rtex->dcc_offset,
                                         rtex->surface.dcc_size,
-                                        0xFFFFFFFF, R600_COHERENCY_NONE);
+                                        0xFFFFFFFF);
        }
 
        /* Initialize the CMASK base register value. */