bld_base->emit_fetch_funcs[TGSI_FILE_CONSTANT] = llvm_fetch_const;
bld_base->emit_prologue = llvm_emit_prologue;
bld_base->emit_epilogue = llvm_emit_epilogue;
- ctx->userdata = ctx;
ctx->load_input = llvm_load_input;
ctx->load_system_value = llvm_load_system_value;
radeon_llvm_ctx.chip_class = ctx.bc->chip_class;
radeon_llvm_ctx.fs_color_all = shader->fs_write_all && (rscreen->b.chip_class >= EVERGREEN);
radeon_llvm_ctx.stream_outputs = &so;
- radeon_llvm_ctx.clip_vertex = ctx.cv_output;
radeon_llvm_ctx.alpha_to_one = key.alpha_to_one;
radeon_llvm_ctx.has_compressed_msaa_texturing =
ctx.bc->has_compressed_msaa_texturing;
unsigned type;
unsigned face_gpr;
unsigned two_side;
- unsigned clip_vertex;
unsigned inputs_count;
struct r600_shader_io * r600_inputs;
struct r600_shader_io * r600_outputs;
/*=== Front end configuration ===*/
- /* Special Intrinsics */
-
- /** Write to an output register: float store_output(float, i32) */
- const char * store_output_intr;
-
- /** Swizzle a vector value: <4 x float> swizzle(<4 x float>, i32)
- * The swizzle is an unsigned integer that encodes a TGSI_SWIZZLE_* value
- * in 2-bits.
- * Swizzle{0-1} = X Channel
- * Swizzle{2-3} = Y Channel
- * Swizzle{4-5} = Z Channel
- * Swizzle{6-7} = W Channel
- */
- const char * swizzle_intr;
-
/* Instructions that are not described by any of the TGSI opcodes. */
/** This function is responsible for initilizing the inputs array and will be
unsigned index,
const struct tgsi_full_declaration *decl);
- /** User data to use with the callbacks */
- void * userdata;
-
/** This array contains the input values for the shader. Typically these
* values will be in the form of a target intrinsic that will inform the
* backend how to load the actual inputs to the shader.
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
{
- /* XXX: lp_build_swizzle_aos() was failing with wrong arg types,
- * when we used CHAN_ALL. We should be able to get this to work,
- * but for now we will swizzle it ourselves
- emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
- 0, CHAN_ALL);
-
- */
-
const struct tgsi_full_instruction * inst = emit_data->inst;
LLVMValueRef coords[5];
ctx->gallivm.context);
ctx->gallivm.builder = LLVMCreateBuilderInContext(ctx->gallivm.context);
- ctx->store_output_intr = "llvm.AMDGPU.store.output.";
- ctx->swizzle_intr = "llvm.AMDGPU.swizzle";
struct lp_build_tgsi_context * bld_base = &ctx->soa.bld_base;
- /* XXX: We need to revisit this.I think the correct way to do this is
- * to use length = 4 here and use the elem_bld for everything. */
type.floating = TRUE;
type.fixed = FALSE;
type.sign = TRUE;
/* Allocate outputs */
ctx->soa.outputs = ctx->outputs;
- /* XXX: Is there a better way to initialize all this ? */
-
lp_set_default_actions(bld_base);
bld_base->op_actions[TGSI_OPCODE_ABS].emit = build_tgsi_intrinsic_nomem;