gallium/radeon: remove unused variables and old comments
authorMarek Olšák <marek.olsak@amd.com>
Sat, 25 Jul 2015 14:53:29 +0000 (16:53 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 31 Jul 2015 14:49:16 +0000 (16:49 +0200)
Reviewed-by: Dave Airlie <airlied@redhat.com>
src/gallium/drivers/r600/r600_llvm.c
src/gallium/drivers/r600/r600_shader.c
src/gallium/drivers/radeon/radeon_llvm.h
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c

index 686c92cda06f11d523e3e1627fedb4a2eb8c3afc..f86554902e482b7ae3b397a72c5ca5cfb05e9274 100644 (file)
@@ -783,7 +783,6 @@ LLVMModuleRef r600_tgsi_llvm(
        bld_base->emit_fetch_funcs[TGSI_FILE_CONSTANT] = llvm_fetch_const;
        bld_base->emit_prologue = llvm_emit_prologue;
        bld_base->emit_epilogue = llvm_emit_epilogue;
-       ctx->userdata = ctx;
        ctx->load_input = llvm_load_input;
        ctx->load_system_value = llvm_load_system_value;
 
index dda38f6f905029d64bbad01962ba8363c159e795..09f50f5d810ba12a253b00643550d47ff0445bbb 100644 (file)
@@ -2091,7 +2091,6 @@ static int r600_shader_from_tgsi(struct r600_context *rctx,
                radeon_llvm_ctx.chip_class = ctx.bc->chip_class;
                radeon_llvm_ctx.fs_color_all = shader->fs_write_all && (rscreen->b.chip_class >= EVERGREEN);
                radeon_llvm_ctx.stream_outputs = &so;
-               radeon_llvm_ctx.clip_vertex = ctx.cv_output;
                radeon_llvm_ctx.alpha_to_one = key.alpha_to_one;
                radeon_llvm_ctx.has_compressed_msaa_texturing =
                        ctx.bc->has_compressed_msaa_texturing;
index 9e05c2447eec4ac9b79c018376350699d334e21e..e967ad2214e850255e3372ef5bfc9e3a3d589624 100644 (file)
@@ -58,7 +58,6 @@ struct radeon_llvm_context {
        unsigned type;
        unsigned face_gpr;
        unsigned two_side;
-       unsigned clip_vertex;
        unsigned inputs_count;
        struct r600_shader_io * r600_inputs;
        struct r600_shader_io * r600_outputs;
@@ -72,21 +71,6 @@ struct radeon_llvm_context {
 
        /*=== Front end configuration ===*/
 
-       /* Special Intrinsics */
-
-       /** Write to an output register: float store_output(float, i32) */
-       const char * store_output_intr;
-
-       /** Swizzle a vector value: <4 x float> swizzle(<4 x float>, i32)
-        * The swizzle is an unsigned integer that encodes a TGSI_SWIZZLE_* value
-        * in 2-bits.
-        * Swizzle{0-1} = X Channel
-        * Swizzle{2-3} = Y Channel
-        * Swizzle{4-5} = Z Channel
-        * Swizzle{6-7} = W Channel
-        */
-       const char * swizzle_intr;
-
        /* Instructions that are not described by any of the TGSI opcodes. */
 
        /** This function is responsible for initilizing the inputs array and will be
@@ -100,9 +84,6 @@ struct radeon_llvm_context {
                        unsigned index,
                        const struct tgsi_full_declaration *decl);
 
-       /** User data to use with the callbacks */
-       void * userdata;
-
        /** This array contains the input values for the shader.  Typically these
          * values will be in the form of a target intrinsic that will inform the
          * backend how to load the actual inputs to the shader. 
index 66602c9e3117fcee8fa1ddebc36a2aa857d602b8..5a131f0a0196912cec1c100495ae62806443381e 100644 (file)
@@ -918,14 +918,6 @@ static void tex_fetch_args(
        struct lp_build_tgsi_context * bld_base,
        struct lp_build_emit_data * emit_data)
 {
-       /* XXX: lp_build_swizzle_aos() was failing with wrong arg types,
-        * when we used CHAN_ALL.  We should be able to get this to work,
-        * but for now we will swizzle it ourselves
-       emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
-                                                0, CHAN_ALL);
-
-       */
-
        const struct tgsi_full_instruction * inst = emit_data->inst;
 
        LLVMValueRef coords[5];
@@ -1508,12 +1500,8 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
                                                ctx->gallivm.context);
        ctx->gallivm.builder = LLVMCreateBuilderInContext(ctx->gallivm.context);
 
-       ctx->store_output_intr = "llvm.AMDGPU.store.output.";
-       ctx->swizzle_intr = "llvm.AMDGPU.swizzle";
        struct lp_build_tgsi_context * bld_base = &ctx->soa.bld_base;
 
-       /* XXX: We need to revisit this.I think the correct way to do this is
-        * to use length = 4 here and use the elem_bld for everything. */
        type.floating = TRUE;
        type.fixed = FALSE;
        type.sign = TRUE;
@@ -1546,8 +1534,6 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
        /* Allocate outputs */
        ctx->soa.outputs = ctx->outputs;
 
-       /* XXX: Is there a better way to initialize all this ? */
-
        lp_set_default_actions(bld_base);
 
        bld_base->op_actions[TGSI_OPCODE_ABS].emit = build_tgsi_intrinsic_nomem;