}
} /* Namespace selftest. */
+#undef TARGET_RUN_TARGET_SELFTESTS
+#define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests
+#endif /* CHECKING_P */
+
+/* Worker function for TARGET_MD_ASM_ADJUST, while in thumb1 mode.
+ Unlike the arm version, we do NOT implement asm flag outputs. */
+
+rtx_insn *
+thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
+ vec<const char *> &constraints,
+ vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+{
+ for (unsigned i = 0, n = outputs.length (); i < n; ++i)
+ if (strncmp (constraints[i], "=@cc", 4) == 0)
+ {
+ sorry ("asm flags not supported in thumb1 mode");
+ break;
+ }
+ return NULL;
+}
/* Generate code to enable conditional branches in functions over 1 MiB.
Parameters are:
return "";
}
-#undef TARGET_RUN_TARGET_SELFTESTS
-#define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests
-#endif /* CHECKING_P */
-
-/* Worker function for TARGET_MD_ASM_ADJUST, while in thumb1 mode.
- Unlike the arm version, we do NOT implement asm flag outputs. */
-
-rtx_insn *
-thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
-{
- for (unsigned i = 0, n = outputs.length (); i < n; ++i)
- if (strncmp (constraints[i], "=@cc", 4) == 0)
- {
- sorry ("asm flags not supported in thumb1 mode");
- break;
- }
- return NULL;
-}
-
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-arm.h"