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re PR target/70341 (cost model for addresses is incorrect, slsr is using reg + reg...
authorJakub Jelinek <jakub@redhat.com>
Wed, 27 Feb 2019 14:50:35 +0000 (15:50 +0100)
committerJakub Jelinek <jakub@gcc.gnu.org>
Wed, 27 Feb 2019 14:50:35 +0000 (15:50 +0100)
PR target/70341
* config/arm/arm.md (arm_casesi_internal): New define_expand.  Rename
old define_insn to ...
(*arm_casesi_internal): ... this.  Add mode to LABEL_REFs.
* config/arm/thumb2.md (thumb2_casesi_internal): New define_expand.
Rename old define_insn to ...
(*thumb2_casesi_internal): ... this.  Add mode to LABEL_REFs.
(thumb2_casesi_internal_pic): New define_expand.  Rename old
define_insn to ...
(*thumb2_casesi_internal_pic): ... this.  Add mode to LABEL_REFs.

From-SVN: r269255

gcc/ChangeLog patch | blob | history
gcc/config/arm/arm.md patch | blob | history
gcc/config/arm/thumb2.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d77e7d203815c0379d0ede49cca4a3b286a4120c..2fd847ac1fee02c9b3146214f7a35402d8526c26 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2019-02-27  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/70341
+       * config/arm/arm.md (arm_casesi_internal): New define_expand.  Rename
+       old define_insn to ...
+       (*arm_casesi_internal): ... this.  Add mode to LABEL_REFs.
+       * config/arm/thumb2.md (thumb2_casesi_internal): New define_expand.
+       Rename old define_insn to ...
+       (*thumb2_casesi_internal): ... this.  Add mode to LABEL_REFs.
+       (thumb2_casesi_internal_pic): New define_expand.  Rename old
+       define_insn to ...
+       (*thumb2_casesi_internal_pic): ... this.  Add mode to LABEL_REFs.
+
 2019-02-27  Richard Biener  <rguenther@suse.de>
 
        PR debug/88878
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 349b0a5d07d2c966e4d178348312017940be482f..baf71a546bc431a24ebdadf8623496a8efbcb840 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8939,16 +8939,35 @@
 
 ;; The USE in this pattern is needed to tell flow analysis that this is
 ;; a CASESI insn.  It has no other purpose.
-(define_insn "arm_casesi_internal"
+(define_expand "arm_casesi_internal"
+  [(parallel [(set (pc)
+              (if_then_else
+               (leu (match_operand:SI 0 "s_register_operand")
+                    (match_operand:SI 1 "arm_rhs_operand"))
+               (match_dup 4)
+               (label_ref:SI (match_operand 3 ""))))
+             (clobber (reg:CC CC_REGNUM))
+             (use (label_ref:SI (match_operand 2 "")))])]
+  "TARGET_ARM"
+{
+  operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
+  operands[4] = gen_rtx_PLUS (SImode, operands[4],
+                             gen_rtx_LABEL_REF (SImode, operands[2]));
+  operands[4] = gen_rtx_MEM (SImode, operands[4]);
+  MEM_READONLY_P (operands[4]) = 1;
+  MEM_NOTRAP_P (operands[4]) = 1;
+})
+
+(define_insn "*arm_casesi_internal"
   [(parallel [(set (pc)
               (if_then_else
                (leu (match_operand:SI 0 "s_register_operand" "r")
                     (match_operand:SI 1 "arm_rhs_operand" "rI"))
                (mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
-                                (label_ref (match_operand 2 "" ""))))
-               (label_ref (match_operand 3 "" ""))))
+                                (label_ref:SI (match_operand 2 "" ""))))
+               (label_ref:SI (match_operand 3 "" ""))))
              (clobber (reg:CC CC_REGNUM))
-             (use (label_ref (match_dup 2)))])]
+             (use (label_ref:SI (match_dup 2)))])]
   "TARGET_ARM"
   "*
     if (flag_pic)
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index e3f767627cf397b2d559d03793d240445704105d..111692466d1bfe89eaf87450d8afbecb86029c47 100644 (file)
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -1079,17 +1079,37 @@
    (set_attr "neg_pool_range" "*,250")]
 )
 
-(define_insn "thumb2_casesi_internal"
+(define_expand "thumb2_casesi_internal"
+  [(parallel [(set (pc)
+              (if_then_else
+               (leu (match_operand:SI 0 "s_register_operand")
+                    (match_operand:SI 1 "arm_rhs_operand"))
+               (match_dup 4)
+               (label_ref:SI (match_operand 3 ""))))
+             (clobber (reg:CC CC_REGNUM))
+             (clobber (match_scratch:SI 5))
+             (use (label_ref:SI (match_operand 2 "")))])]
+  "TARGET_THUMB2 && !flag_pic"
+{
+  operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
+  operands[4] = gen_rtx_PLUS (SImode, operands[4],
+                             gen_rtx_LABEL_REF (SImode, operands[2]));
+  operands[4] = gen_rtx_MEM (SImode, operands[4]);
+  MEM_READONLY_P (operands[4]) = 1;
+  MEM_NOTRAP_P (operands[4]) = 1;
+})
+
+(define_insn "*thumb2_casesi_internal"
   [(parallel [(set (pc)
               (if_then_else
                (leu (match_operand:SI 0 "s_register_operand" "r")
                     (match_operand:SI 1 "arm_rhs_operand" "rI"))
                (mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
-                                (label_ref (match_operand 2 "" ""))))
-               (label_ref (match_operand 3 "" ""))))
+                                (label_ref:SI (match_operand 2 "" ""))))
+               (label_ref:SI (match_operand 3 "" ""))))
              (clobber (reg:CC CC_REGNUM))
              (clobber (match_scratch:SI 4 "=&r"))
-             (use (label_ref (match_dup 2)))])]
+             (use (label_ref:SI (match_dup 2)))])]
   "TARGET_THUMB2 && !flag_pic"
   "* return thumb2_output_casesi(operands);"
   [(set_attr "conds" "clob")
@@ -1097,18 +1117,39 @@
    (set_attr "type" "multiple")]
 )
 
-(define_insn "thumb2_casesi_internal_pic"
+(define_expand "thumb2_casesi_internal_pic"
+  [(parallel [(set (pc)
+              (if_then_else
+               (leu (match_operand:SI 0 "s_register_operand")
+                    (match_operand:SI 1 "arm_rhs_operand"))
+               (match_dup 4)
+               (label_ref:SI (match_operand 3 ""))))
+             (clobber (reg:CC CC_REGNUM))
+             (clobber (match_scratch:SI 5))
+             (clobber (match_scratch:SI 6))
+             (use (label_ref:SI (match_operand 2 "")))])]
+  "TARGET_THUMB2 && flag_pic"
+{
+  operands[4] = gen_rtx_MULT (SImode, operands[0], GEN_INT (4));
+  operands[4] = gen_rtx_PLUS (SImode, operands[4],
+                             gen_rtx_LABEL_REF (SImode, operands[2]));
+  operands[4] = gen_rtx_MEM (SImode, operands[4]);
+  MEM_READONLY_P (operands[4]) = 1;
+  MEM_NOTRAP_P (operands[4]) = 1;
+})
+
+(define_insn "*thumb2_casesi_internal_pic"
   [(parallel [(set (pc)
               (if_then_else
                (leu (match_operand:SI 0 "s_register_operand" "r")
                     (match_operand:SI 1 "arm_rhs_operand" "rI"))
                (mem:SI (plus:SI (mult:SI (match_dup 0) (const_int 4))
-                                (label_ref (match_operand 2 "" ""))))
-               (label_ref (match_operand 3 "" ""))))
+                                (label_ref:SI (match_operand 2 "" ""))))
+               (label_ref:SI (match_operand 3 "" ""))))
              (clobber (reg:CC CC_REGNUM))
              (clobber (match_scratch:SI 4 "=&r"))
              (clobber (match_scratch:SI 5 "=r"))
-             (use (label_ref (match_dup 2)))])]
+             (use (label_ref:SI (match_dup 2)))])]
   "TARGET_THUMB2 && flag_pic"
   "* return thumb2_output_casesi(operands);"
   [(set_attr "conds" "clob")