found chiselwatt ulx3s constraint file

https://github.com/antonblanchard/chiselwatt/blob/master/constraints/ecp5-ulx3s.lpf

diff --git a/constraints/ulx3s.lpf b/constraints/ulx3s.lpf
index abbc94c2c079ead9a09f2fdb753002e540ead646..234c34196de2a16faeabe907f8633a0d9d501584 100644 (file)
--- a/constraints/ulx3s.lpf
+++ b/constraints/ulx3s.lpf
@@ -1,5 +1,6 @@
 LOCATE COMP "ext_clk" SITE "G2";
-IOBUF PORT "ext_clk" IO_TYPE=LVCMOS33;
+IOBUF PORT "ext_clk" IO_TYPE=LVCMOS33 PULLMODE=NONE;
+FREQUENCY PORT "ext_clk" 25 MHZ;
 
 LOCATE COMP "ext_rst" SITE "D6";
 IOBUF PORT "ext_rst" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
@@ -7,13 +8,13 @@ IOBUF PORT "ext_rst" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
 LOCATE COMP "uart0_txd" SITE "L4";
 LOCATE COMP "uart0_rxd" SITE "M1";
 
-IOBUF PORT "uart0_txd" IO_TYPE=LVCMOS33;
-IOBUF PORT "uart0_rxd" IO_TYPE=LVCMOS33;
+IOBUF PORT "uart0_txd" IO_TYPE=LVCMOS33 PULLMODE=UP DRIVE=4;
+IOBUF PORT "uart0_rxd" IO_TYPE=LVCMOS33 PULLMODE=UP;
 
 LOCATE COMP "led_a" SITE "B2";
 LOCATE COMP "led_b" SITE "C2";
 LOCATE COMP "led_c" SITE "C1";
 
-IOBUF PORT "led_a" IO_TYPE=LVCMOS25 DRIVE=4;
-IOBUF PORT "led_b" IO_TYPE=LVCMOS25 DRIVE=4;
-IOBUF PORT "led_c" IO_TYPE=LVCMOS25 DRIVE=4;
+IOBUF PORT "led_a" IO_TYPE=LVCMOS25 DRIVE=4 PULLMODE=NONE;
+IOBUF PORT "led_b" IO_TYPE=LVCMOS25 DRIVE=4 PULLMODE=NONE;
+IOBUF PORT "led_c" IO_TYPE=LVCMOS25 DRIVE=4 PULLMODE=NONE;