nir/compiler: keep same bit size when lowering with flrp

This was probably not caught before because no supported test was
exercising the flrp lowering with other bit size different than 32.

With the arrival of VK_KHR_shader_float_controls we will have some of
those and, unless we keep the bit size, we will end with something
like:

../src/compiler/nir/nir_builder.h:420: nir_builder_alu_instr_finish_and_insert: Assertion `src_bit_size == bit_size' failed.

Fixes: 158370ed2a0 ("nir/flrp: Add new lowering pass for flrp instructions")
Fixes: ae02622d8fd ("nir/flrp: Lower flrp(a, b, c) differently if another flrp(_, b, c) exists")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrnd.net>

diff --git a/src/compiler/nir/nir_lower_flrp.c b/src/compiler/nir/nir_lower_flrp.c
index bc5d71db1b00232372ea22af867ef72175ad2e69..38be18ecc6ba04fb42424f4253776ae3584cbb92 100644 (file)
--- a/src/compiler/nir/nir_lower_flrp.c
+++ b/src/compiler/nir/nir_lower_flrp.c
@@ -84,7 +84,7 @@ replace_with_single_ffma(struct nir_builder *bld, struct u_vector *dead_flrp,
    nir_instr_as_alu(neg_c->parent_instr)->exact = alu->exact;
 
    nir_ssa_def *const one_minus_c =
-      nir_fadd(bld, nir_imm_float(bld, 1.0f), neg_c);
+      nir_fadd(bld, nir_imm_floatN_t(bld, 1.0f, c->bit_size), neg_c);
    nir_instr_as_alu(one_minus_c->parent_instr)->exact = alu->exact;
 
    nir_ssa_def *const b_times_c = nir_fmul(bld, b, c);
@@ -117,7 +117,7 @@ replace_with_strict(struct nir_builder *bld, struct u_vector *dead_flrp,
    nir_instr_as_alu(neg_c->parent_instr)->exact = alu->exact;
 
    nir_ssa_def *const one_minus_c =
-      nir_fadd(bld, nir_imm_float(bld, 1.0f), neg_c);
+      nir_fadd(bld, nir_imm_floatN_t(bld, 1.0f, c->bit_size), neg_c);
    nir_instr_as_alu(one_minus_c->parent_instr)->exact = alu->exact;
 
    nir_ssa_def *const first_product = nir_fmul(bld, a, one_minus_c);