No tristate warning message for "read_verilog -lib"

diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc
index 576f068b3f870087767eb34dc9cca1168f6de691..87ea8c6ae27a6e4d24ef9ebb79b8372c936702cb 100644 (file)
--- a/frontends/verilog/verilog_frontend.cc
+++ b/frontends/verilog/verilog_frontend.cc
@@ -175,7 +175,6 @@ struct VerilogFrontend : public Frontend {
                bool flag_ppdump = false;
                bool flag_nopp = false;
                bool flag_nodpi = false;
-               bool flag_lib = false;
                bool flag_noopt = false;
                bool flag_icells = false;
                bool flag_ignore_redef = false;
@@ -187,6 +186,7 @@ struct VerilogFrontend : public Frontend {
                frontend_verilog_yydebug = false;
                sv_mode = false;
                formal_mode = false;
+               lib_mode = false;
                default_nettype_wire = true;
 
                log_header(design, "Executing Verilog-2005 frontend.\n");
@@ -249,7 +249,7 @@ struct VerilogFrontend : public Frontend {
                                continue;
                        }
                        if (arg == "-lib") {
-                               flag_lib = true;
+                               lib_mode = true;
                                defines_map["BLACKBOX"] = string();
                                continue;
                        }
@@ -342,7 +342,7 @@ struct VerilogFrontend : public Frontend {
                if (flag_nodpi)
                        error_on_dpi_function(current_ast);
 
-               AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_dump_vlog, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells, flag_ignore_redef, flag_defer, default_nettype_wire);
+               AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_dump_vlog, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, lib_mode, flag_noopt, flag_icells, flag_ignore_redef, flag_defer, default_nettype_wire);
 
                if (!flag_nopp)
                        delete lexin;

diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h
index fb98f4afb9fb833f3253539fbe5114c912f87107..3801aed4abc63c2117be4a594d244a5c31a89e4b 100644 (file)
--- a/frontends/verilog/verilog_frontend.h
+++ b/frontends/verilog/verilog_frontend.h
@@ -54,6 +54,9 @@ namespace VERILOG_FRONTEND
        // running in -formal mode
        extern bool formal_mode;
 
+       // running in -lib mode
+       extern bool lib_mode;
+
        // lexer input stream
        extern std::istream *lexin;
 }

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 86a12742802f1a886b09d47d641d6acd5fc9ae91..f39c6011667ae3e1eda2c7b600d1d1bed147edf6 100644 (file)
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -57,7 +57,7 @@ namespace VERILOG_FRONTEND {
        std::vector<char> case_type_stack;
        bool do_not_require_port_stubs;
        bool default_nettype_wire;
-       bool sv_mode, formal_mode;
+       bool sv_mode, formal_mode, lib_mode;
        std::istream *lexin;
 }
 YOSYS_NAMESPACE_END
@@ -1315,7 +1315,7 @@ basic_expr:
                if ($4->substr(0, 1) != "'")
                        frontend_verilog_yyerror("Syntax error.");
                AstNode *bits = $2;
-               AstNode *val = const2ast(*$4, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true);
+               AstNode *val = const2ast(*$4, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
                if (val == NULL)
                        log_error("Value conversion failed: `%s'\n", $4->c_str());
                $$ = new AstNode(AST_TO_BITS, bits, val);
@@ -1326,7 +1326,7 @@ basic_expr:
                        frontend_verilog_yyerror("Syntax error.");
                AstNode *bits = new AstNode(AST_IDENTIFIER);
                bits->str = *$1;
-               AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true);
+               AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
                if (val == NULL)
                        log_error("Value conversion failed: `%s'\n", $2->c_str());
                $$ = new AstNode(AST_TO_BITS, bits, val);
@@ -1334,14 +1334,14 @@ basic_expr:
                delete $2;
        } |
        TOK_CONST TOK_CONST {
-               $$ = const2ast(*$1 + *$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true);
+               $$ = const2ast(*$1 + *$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
                if ($$ == NULL || (*$2)[0] != '\'')
                        log_error("Value conversion failed: `%s%s'\n", $1->c_str(), $2->c_str());
                delete $1;
                delete $2;
        } |
        TOK_CONST {
-               $$ = const2ast(*$1, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true);
+               $$ = const2ast(*$1, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
                if ($$ == NULL)
                        log_error("Value conversion failed: `%s'\n", $1->c_str());
                delete $1;