+2005-11-05 Richard Henderson <rth@redhat.com>
+
+ * gcc.target/alpha/asm-1.c: Move from gcc.dg/asm-5.c.
+ * gcc.target/alpha/cix-1.c, gcc.target/alpha/cix-2.c,
+ gcc.target/alpha/max-1.c, gcc.target/alpha/max-2.c,
+ gcc.target/alpha/base-1.c, gcc.target/alpha/base-2.c: Move
+ from gcc.dg/alpha-*.
+ * gcc.target/alpha/980217-1.c, gcc.target/alpha/20011018-1.c,
+ gcc.target/alpha/20000715-1.c: Move from gcc.dg/.
+
2005-11-05 Andreas Jaeger <aj@suse.de>
* gcc.target/i386/20020523-2.c: Fix path for i386-cpuid.h.
+++ /dev/null
-/* { dg-do compile { target alpha*-*-* } } */
-/* { dg-options "-O2 -mieee" } */
-
-float foo(unsigned char n)
-{
- float r = 10 * n;
- asm volatile("" : : : "memory");
- return r;
-}
+++ /dev/null
-/* { dg-do compile { target alpha*-*-* } } */
-/* { dg-options "-O2 -mieee" } */
-
-double foo (void);
-void bar (float, float);
-
-void test (void)
-{
- float f, g;
-
- f = foo();
- g = foo();
- asm ("");
- bar (f, g);
-}
+++ /dev/null
-/* Test float on alpha. */
-
-/* { dg-do run { target alpha*-*-* } } */
-/* { dg-options "-mieee -O2" } */
-
-extern void abort(void);
-extern int printf(const char *, ...);
-
-typedef int int32_t __attribute__ ((__mode__ ( __SI__ ))) ;
-typedef union
-{
- float value;
- int32_t word;
-} ieee_float_shape_type;
-
-int isinff(float x)
-{
- int32_t ix,t;
- ieee_float_shape_type gf_u;
- gf_u.value = x;
- ix = gf_u.word;
- printf ("%x\n", ix);
- t = ix & 0x7fffffff;
- t ^= 0x7f800000;
- t |= -t;
- return ~(t >> 31) & (1 - ((ix & 0x80000000) >> 30));
-}
-
-main ()
-{
- float x = 1.0 / 0.0;
- int i = isinff (x);
-
- if (i == 0)
- abort ();
-
- printf ("%d\n", i);
- return 0;
-}
+++ /dev/null
-/* Test that the base isa builtins compile. */
-/* { dg-do link { target alpha*-*-* } } */
-/* { dg-options "-mcpu=ev4" } */
-
-void test_BASE (long x, long y)
-{
- volatile long sink;
- long z;
-
- sink = __builtin_alpha_implver ();
- sink = __builtin_alpha_rpcc ();
-
- sink = __builtin_alpha_amask (-1);
- sink = __builtin_alpha_amask (x);
-
- sink = __builtin_alpha_cmpbge (x, y);
- sink = __builtin_alpha_cmpbge (-1, x);
-
- sink = __builtin_alpha_extbl (x, y);
- sink = __builtin_alpha_extwl (x, y);
- sink = __builtin_alpha_extll (x, y);
- sink = __builtin_alpha_extql (x, y);
- sink = __builtin_alpha_extwh (x, y);
- sink = __builtin_alpha_extlh (x, y);
- sink = __builtin_alpha_extqh (x, y);
-
- sink = __builtin_alpha_insbl (x, y);
- sink = __builtin_alpha_inswl (x, y);
- sink = __builtin_alpha_insll (x, y);
- sink = __builtin_alpha_insql (x, y);
- sink = __builtin_alpha_inswh (x, y);
- sink = __builtin_alpha_inslh (x, y);
- sink = __builtin_alpha_insqh (x, y);
-
- sink = __builtin_alpha_mskbl (x, y);
- sink = __builtin_alpha_mskwl (x, y);
- sink = __builtin_alpha_mskll (x, y);
- sink = __builtin_alpha_mskql (x, y);
- sink = __builtin_alpha_mskwh (x, y);
- sink = __builtin_alpha_msklh (x, y);
- sink = __builtin_alpha_mskqh (x, y);
-
- sink = __builtin_alpha_umulh (x, y);
-}
-
-void test_zap (long x, long y)
-{
- volatile long sink;
- long z;
- sink = __builtin_alpha_zap (x, y);
- sink = __builtin_alpha_zap (x, 0xaa);
- z = 0xaa;
- sink = __builtin_alpha_zap (x, z);
- z = 0;
- sink = __builtin_alpha_zap (z, x);
- sink = __builtin_alpha_zap (x, z);
-}
-
-void test_zapnot (long x, long y)
-{
- volatile long sink;
- long z;
-
- sink = __builtin_alpha_zapnot (x, y);
- sink = __builtin_alpha_zapnot (x, 0xaa);
- z = 0xaa;
- sink = __builtin_alpha_zapnot (x, z);
- z = 0;
- sink = __builtin_alpha_zapnot (z, x);
- sink = __builtin_alpha_zapnot (x, z);
-}
-
-int main() { return 0; }
+++ /dev/null
-/* Test that alpha-base-1.c compiles with optimization. */
-/* { dg-do link { target alpha*-*-* } } */
-/* { dg-options "-mcpu=ev4 -O2" } */
-
-#include "alpha-base-1.c"
+++ /dev/null
-/* Test that the CIX isa builtins compile. */
-/* { dg-do link { target alpha*-*-* } } */
-/* { dg-options "-mcpu=ev67" } */
-
-void test_CIX (long x)
-{
- volatile long sink;
-
- sink = __builtin_alpha_cttz (x);
- sink = __builtin_alpha_ctlz (x);
- sink = __builtin_alpha_ctpop (x);
-}
-
-int main() { return 0; }
+++ /dev/null
-/* Test that alpha-cix-1.c compiles with optimization. */
-/* { dg-do link { target alpha*-*-* } } */
-/* { dg-options "-mcpu=ev67 -O2" } */
-
-#include "alpha-cix-1.c"
+++ /dev/null
-/* Test that the MAX isa builtins compile. */
-/* { dg-do link { target alpha*-*-* } } */
-/* { dg-options "-mcpu=pca56" } */
-
-void test_MAX (long x, long y)
-{
- volatile long sink;
-
- sink = __builtin_alpha_pklb (x);
- sink = __builtin_alpha_pkwb (x);
- sink = __builtin_alpha_unpkbl (x);
- sink = __builtin_alpha_unpkbw (x);
-
- sink = __builtin_alpha_minub8 (0, x);
- sink = __builtin_alpha_minub8 (1, x);
- sink = __builtin_alpha_minub8 (x, y);
- sink = __builtin_alpha_minsb8 (x, y);
- sink = __builtin_alpha_minuw4 (x, y);
- sink = __builtin_alpha_minsw4 (x, y);
- sink = __builtin_alpha_maxub8 (x, y);
- sink = __builtin_alpha_maxsb8 (x, y);
- sink = __builtin_alpha_maxuw4 (x, y);
- sink = __builtin_alpha_maxsw4 (x, y);
- sink = __builtin_alpha_perr (x, y);
-}
-
-int main() { return 0; }
+++ /dev/null
-/* Test that alpha-max-1.c compiles with optimization. */
-/* { dg-do link { target alpha*-*-* } } */
-/* { dg-options "-mcpu=pca56 -O2" } */
-
-#include "alpha-max-1.c"
+++ /dev/null
-/* Asm operands that are given as hard registers must keep the same
- hard register all the way through compilation. Example derived
- from glibc source. */
-/* { dg-do compile { target alpha*-*-* } } */
-/* { dg-options "-O2 -frename-registers -fcprop-registers" } */
-/* { dg-final { scan-assembler "callsys1 .0 .19 .0 .16 .17" } } */
-/* { dg-final { scan-assembler "callsys2 .0 .19 .0 .16 .17" } } */
-
-struct stat {
- int dummy;
-};
-
-struct kernel_stat {
- int dummy;
-};
-
-extern int xstat_conv (int vers, struct kernel_stat *kbuf, void *ubuf);
-extern int *__errno_location (void) __attribute__ ((__const__));
-
-int
-__fxstat (int vers, int fd, struct stat *buf)
-{
- struct kernel_stat kbuf;
- int result;
-
- if (vers == 0)
- return
- ({
- long _sc_ret, _sc_err;
- {
- register long _sc_0 __asm__("$0");
- register long _sc_16 __asm__("$16");
- register long _sc_17 __asm__("$17");
- register long _sc_19 __asm__("$19");
- _sc_0 = 91;
- _sc_16 = (long) (fd);
- _sc_17 = (long) (((struct kernel_stat *) buf));
- __asm__("callsys1 %0 %1 %2 %3 %4"
- : "=r"(_sc_0), "=r"(_sc_19)
- : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17)
- : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
- "$22", "$23", "$24", "$25", "$27", "$28", "memory");
- _sc_ret = _sc_0, _sc_err = _sc_19;
- }
- if (_sc_err)
- {
- (*__errno_location ()) = (_sc_ret);
- _sc_ret = -1L;
- }
- _sc_ret;
- });
-
- result =
- ({
- long _sc_ret, _sc_err;
- {
- register long _sc_0 __asm__("$0");
- register long _sc_16 __asm__("$16");
- register long _sc_17 __asm__("$17");
- register long _sc_19 __asm__("$19");
- _sc_0 = 91;
- _sc_16 = (long) (fd);
- _sc_17 = (long) ((&kbuf));
- __asm__("callsys2 %0 %1 %2 %3 %4"
- : "=r"(_sc_0), "=r"(_sc_19)
- : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17)
- : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
- "$22", "$23", "$24", "$25", "$27", "$28", "memory");
- _sc_ret = _sc_0, _sc_err = _sc_19;
- }
- if (_sc_err)
- {
- (*__errno_location ()) = (_sc_ret);
- _sc_ret = -1L;
- }
- _sc_ret;
- });
- if (result == 0)
- result = xstat_conv (vers, &kbuf, buf);
-
- return result;
-}
--- /dev/null
+/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-options "-O2 -mieee" } */
+
+float foo(unsigned char n)
+{
+ float r = 10 * n;
+ asm volatile("" : : : "memory");
+ return r;
+}
--- /dev/null
+/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-options "-O2 -mieee" } */
+
+double foo (void);
+void bar (float, float);
+
+void test (void)
+{
+ float f, g;
+
+ f = foo();
+ g = foo();
+ asm ("");
+ bar (f, g);
+}
--- /dev/null
+/* Test float on alpha. */
+
+/* { dg-do run { target alpha*-*-* } } */
+/* { dg-options "-mieee -O2" } */
+
+extern void abort(void);
+extern int printf(const char *, ...);
+
+typedef int int32_t __attribute__ ((__mode__ ( __SI__ ))) ;
+typedef union
+{
+ float value;
+ int32_t word;
+} ieee_float_shape_type;
+
+int isinff(float x)
+{
+ int32_t ix,t;
+ ieee_float_shape_type gf_u;
+ gf_u.value = x;
+ ix = gf_u.word;
+ printf ("%x\n", ix);
+ t = ix & 0x7fffffff;
+ t ^= 0x7f800000;
+ t |= -t;
+ return ~(t >> 31) & (1 - ((ix & 0x80000000) >> 30));
+}
+
+main ()
+{
+ float x = 1.0 / 0.0;
+ int i = isinff (x);
+
+ if (i == 0)
+ abort ();
+
+ printf ("%d\n", i);
+ return 0;
+}
--- /dev/null
+/* Asm operands that are given as hard registers must keep the same
+ hard register all the way through compilation. Example derived
+ from glibc source. */
+/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-options "-O2 -frename-registers -fcprop-registers" } */
+/* { dg-final { scan-assembler "callsys1 .0 .19 .0 .16 .17" } } */
+/* { dg-final { scan-assembler "callsys2 .0 .19 .0 .16 .17" } } */
+
+struct stat {
+ int dummy;
+};
+
+struct kernel_stat {
+ int dummy;
+};
+
+extern int xstat_conv (int vers, struct kernel_stat *kbuf, void *ubuf);
+extern int *__errno_location (void) __attribute__ ((__const__));
+
+int
+__fxstat (int vers, int fd, struct stat *buf)
+{
+ struct kernel_stat kbuf;
+ int result;
+
+ if (vers == 0)
+ return
+ ({
+ long _sc_ret, _sc_err;
+ {
+ register long _sc_0 __asm__("$0");
+ register long _sc_16 __asm__("$16");
+ register long _sc_17 __asm__("$17");
+ register long _sc_19 __asm__("$19");
+ _sc_0 = 91;
+ _sc_16 = (long) (fd);
+ _sc_17 = (long) (((struct kernel_stat *) buf));
+ __asm__("callsys1 %0 %1 %2 %3 %4"
+ : "=r"(_sc_0), "=r"(_sc_19)
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17)
+ : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
+ "$22", "$23", "$24", "$25", "$27", "$28", "memory");
+ _sc_ret = _sc_0, _sc_err = _sc_19;
+ }
+ if (_sc_err)
+ {
+ (*__errno_location ()) = (_sc_ret);
+ _sc_ret = -1L;
+ }
+ _sc_ret;
+ });
+
+ result =
+ ({
+ long _sc_ret, _sc_err;
+ {
+ register long _sc_0 __asm__("$0");
+ register long _sc_16 __asm__("$16");
+ register long _sc_17 __asm__("$17");
+ register long _sc_19 __asm__("$19");
+ _sc_0 = 91;
+ _sc_16 = (long) (fd);
+ _sc_17 = (long) ((&kbuf));
+ __asm__("callsys2 %0 %1 %2 %3 %4"
+ : "=r"(_sc_0), "=r"(_sc_19)
+ : "0"(_sc_0), "r"(_sc_16), "r"(_sc_17)
+ : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
+ "$22", "$23", "$24", "$25", "$27", "$28", "memory");
+ _sc_ret = _sc_0, _sc_err = _sc_19;
+ }
+ if (_sc_err)
+ {
+ (*__errno_location ()) = (_sc_ret);
+ _sc_ret = -1L;
+ }
+ _sc_ret;
+ });
+ if (result == 0)
+ result = xstat_conv (vers, &kbuf, buf);
+
+ return result;
+}
--- /dev/null
+/* Test that the base isa builtins compile. */
+/* { dg-do link { target alpha*-*-* } } */
+/* { dg-options "-mcpu=ev4" } */
+
+void test_BASE (long x, long y)
+{
+ volatile long sink;
+ long z;
+
+ sink = __builtin_alpha_implver ();
+ sink = __builtin_alpha_rpcc ();
+
+ sink = __builtin_alpha_amask (-1);
+ sink = __builtin_alpha_amask (x);
+
+ sink = __builtin_alpha_cmpbge (x, y);
+ sink = __builtin_alpha_cmpbge (-1, x);
+
+ sink = __builtin_alpha_extbl (x, y);
+ sink = __builtin_alpha_extwl (x, y);
+ sink = __builtin_alpha_extll (x, y);
+ sink = __builtin_alpha_extql (x, y);
+ sink = __builtin_alpha_extwh (x, y);
+ sink = __builtin_alpha_extlh (x, y);
+ sink = __builtin_alpha_extqh (x, y);
+
+ sink = __builtin_alpha_insbl (x, y);
+ sink = __builtin_alpha_inswl (x, y);
+ sink = __builtin_alpha_insll (x, y);
+ sink = __builtin_alpha_insql (x, y);
+ sink = __builtin_alpha_inswh (x, y);
+ sink = __builtin_alpha_inslh (x, y);
+ sink = __builtin_alpha_insqh (x, y);
+
+ sink = __builtin_alpha_mskbl (x, y);
+ sink = __builtin_alpha_mskwl (x, y);
+ sink = __builtin_alpha_mskll (x, y);
+ sink = __builtin_alpha_mskql (x, y);
+ sink = __builtin_alpha_mskwh (x, y);
+ sink = __builtin_alpha_msklh (x, y);
+ sink = __builtin_alpha_mskqh (x, y);
+
+ sink = __builtin_alpha_umulh (x, y);
+}
+
+void test_zap (long x, long y)
+{
+ volatile long sink;
+ long z;
+ sink = __builtin_alpha_zap (x, y);
+ sink = __builtin_alpha_zap (x, 0xaa);
+ z = 0xaa;
+ sink = __builtin_alpha_zap (x, z);
+ z = 0;
+ sink = __builtin_alpha_zap (z, x);
+ sink = __builtin_alpha_zap (x, z);
+}
+
+void test_zapnot (long x, long y)
+{
+ volatile long sink;
+ long z;
+
+ sink = __builtin_alpha_zapnot (x, y);
+ sink = __builtin_alpha_zapnot (x, 0xaa);
+ z = 0xaa;
+ sink = __builtin_alpha_zapnot (x, z);
+ z = 0;
+ sink = __builtin_alpha_zapnot (z, x);
+ sink = __builtin_alpha_zapnot (x, z);
+}
+
+int main() { return 0; }
--- /dev/null
+/* Test that alpha-base-1.c compiles with optimization. */
+/* { dg-do link { target alpha*-*-* } } */
+/* { dg-options "-mcpu=ev4 -O2" } */
+
+#include "base-1.c"
--- /dev/null
+/* Test that the CIX isa builtins compile. */
+/* { dg-do link { target alpha*-*-* } } */
+/* { dg-options "-mcpu=ev67" } */
+
+void test_CIX (long x)
+{
+ volatile long sink;
+
+ sink = __builtin_alpha_cttz (x);
+ sink = __builtin_alpha_ctlz (x);
+ sink = __builtin_alpha_ctpop (x);
+}
+
+int main() { return 0; }
--- /dev/null
+/* Test that alpha-cix-1.c compiles with optimization. */
+/* { dg-do link { target alpha*-*-* } } */
+/* { dg-options "-mcpu=ev67 -O2" } */
+
+#include "cix-1.c"
--- /dev/null
+/* Test that the MAX isa builtins compile. */
+/* { dg-do link { target alpha*-*-* } } */
+/* { dg-options "-mcpu=pca56" } */
+
+void test_MAX (long x, long y)
+{
+ volatile long sink;
+
+ sink = __builtin_alpha_pklb (x);
+ sink = __builtin_alpha_pkwb (x);
+ sink = __builtin_alpha_unpkbl (x);
+ sink = __builtin_alpha_unpkbw (x);
+
+ sink = __builtin_alpha_minub8 (0, x);
+ sink = __builtin_alpha_minub8 (1, x);
+ sink = __builtin_alpha_minub8 (x, y);
+ sink = __builtin_alpha_minsb8 (x, y);
+ sink = __builtin_alpha_minuw4 (x, y);
+ sink = __builtin_alpha_minsw4 (x, y);
+ sink = __builtin_alpha_maxub8 (x, y);
+ sink = __builtin_alpha_maxsb8 (x, y);
+ sink = __builtin_alpha_maxuw4 (x, y);
+ sink = __builtin_alpha_maxsw4 (x, y);
+ sink = __builtin_alpha_perr (x, y);
+}
+
+int main() { return 0; }
--- /dev/null
+/* Test that alpha-max-1.c compiles with optimization. */
+/* { dg-do link { target alpha*-*-* } } */
+/* { dg-options "-mcpu=pca56 -O2" } */
+
+#include "max-1.c"
projects / gcc.git / commitdiff