mips-dsp.md (add<DSPV:mode>3, [...]): Add ISA_HAS_DSP condition.

* config/mips/mips-dsp.md (add<DSPV:mode>3,
mips_add<DSP:dspfmt1>_s_<DSP:dspfmt2>): Add ISA_HAS_DSP condition.

From-SVN: r159619

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ecadc0204a7fe9105978b68355d719d92f9335a7..4dce40331e419183af9d2b798bb9a5b4536e2a9c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -6,6 +6,9 @@
 
 2010-05-19  James E. Wilson  <wilson@codesourcery.com>
 
+       * config/mips/mips-dsp.md (add<DSPV:mode>3,
+       mips_add<DSP:dspfmt1>_s_<DSP:dspfmt2>): Add ISA_HAS_DSP condition.
+
        PR target/43764
        * mips.c (mips_call_expr_from_insn): New arg second_call.  Set it.
        (mips_annotate_pic_calls): Pass new arg to mips_call_expr_from_insn.

diff --git a/gcc/config/mips/mips-dsp.md b/gcc/config/mips/mips-dsp.md
index dd2459ebcaf02f76b1965b5784583d1997149fcc..9e02f7214f9b55b48bba0ca40d973e28efdcc6e0 100644 (file)
--- a/gcc/config/mips/mips-dsp.md
+++ b/gcc/config/mips/mips-dsp.md
@@ -1,4 +1,4 @@
-;; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+;; Copyright (C) 2005, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
 ;;
@@ -60,7 +60,7 @@
                     (match_operand:DSPV 2 "register_operand" "d")))
      (set (reg:CCDSP CCDSP_OU_REGNUM)
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ))])]
-  ""
+  "ISA_HAS_DSP"
   "add<DSPV:dspfmt1>.<DSPV:dspfmt2>\t%0,%1,%2"
   [(set_attr "type"    "arith")
    (set_attr "mode"    "SI")])
@@ -73,7 +73,7 @@
                      UNSPEC_ADDQ_S))
      (set (reg:CCDSP CCDSP_OU_REGNUM)
          (unspec:CCDSP [(match_dup 1) (match_dup 2)] UNSPEC_ADDQ_S))])]
-  ""
+  "ISA_HAS_DSP"
   "add<DSP:dspfmt1>_s.<DSP:dspfmt2>\t%0,%1,%2"
   [(set_attr "type"    "arith")
    (set_attr "mode"    "SI")])